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Received: from j217100.upc-j.chello.nl ([24.132.217.100] helo=hirez.programming.kicks-ass.net) by merlin.infradead.org with esmtpsa (Exim 4.90_1 #2 (Red Hat Linux)) id 1gT2Qu-00023O-Fo; Sat, 01 Dec 2018 10:23:32 +0000 Received: by hirez.programming.kicks-ass.net (Postfix, from userid 1000) id 476512029FD58; Sat, 1 Dec 2018 11:23:29 +0100 (CET) Date: Sat, 1 Dec 2018 11:23:29 +0100 From: Peter Zijlstra To: Andrea Parri Subject: Re: [PATCH] riscv, atomic: Add #define's for the atomic_{cmp,}xchg_*() variants Message-ID: <20181201102329.GD11614@hirez.programming.kicks-ass.net> References: <20181201000156.5366-1-andrea.parri@amarulasolutions.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20181201000156.5366-1-andrea.parri@amarulasolutions.com> User-Agent: Mutt/1.10.1 (2018-07-13) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Albert Ou , Boqun Feng , Palmer Dabbelt , Will Deacon , linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+infradead-linux-riscv=archiver.kernel.org@lists.infradead.org On Sat, Dec 01, 2018 at 01:01:56AM +0100, Andrea Parri wrote: > If an architecture does not define the atomic_{cmp,}xchg_*() variants, > the generic implementation defaults them to the fully-ordered version. > > riscv's had its own variants since "the beginning", but it never told > (#define-d these for) the generic implementation: it is time to do so. > > Signed-off-by: Andrea Parri > Cc: Palmer Dabbelt > Cc: Albert Ou > Cc: Will Deacon > Cc: Peter Zijlstra > Cc: Boqun Feng Acked-by: Peter Zijlstra (Intel) > --- > arch/riscv/include/asm/atomic.h | 9 +++++++++ > 1 file changed, 9 insertions(+) > > diff --git a/arch/riscv/include/asm/atomic.h b/arch/riscv/include/asm/atomic.h > index c452359c9cb8a..93826771b616a 100644 > --- a/arch/riscv/include/asm/atomic.h > +++ b/arch/riscv/include/asm/atomic.h > @@ -303,6 +303,15 @@ c_t atomic##prefix##_cmpxchg(atomic##prefix##_t *v, c_t o, c_t n) \ > > ATOMIC_OPS() > > +#define atomic_xchg_relaxed atomic_xchg_relaxed > +#define atomic_xchg_acquire atomic_xchg_acquire > +#define atomic_xchg_release atomic_xchg_release > +#define atomic_xchg atomic_xchg > +#define atomic_cmpxchg_relaxed atomic_cmpxchg_relaxed > +#define atomic_cmpxchg_acquire atomic_cmpxchg_acquire > +#define atomic_cmpxchg_release atomic_cmpxchg_release > +#define atomic_cmpxchg atomic_cmpxchg > + > #undef ATOMIC_OPS > #undef ATOMIC_OP > > -- > 2.17.1 > _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv