From: Paul Walmsley <paul.walmsley@sifive.com>
To: linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org,
linux-clk@vger.kernel.org, devicetree@vger.kernel.org
Cc: Mark Rutland <mark.rutland@arm.com>,
Paul Walmsley <paul@pwsan.com>, Stephen Boyd <sboyd@kernel.org>,
Megan Wachs <megan@sifive.com>,
Michael Turquette <mturquette@baylibre.com>,
Palmer Dabbelt <palmer@sifive.com>,
Rob Herring <robh+dt@kernel.org>,
Paul Walmsley <paul.walmsley@sifive.com>
Subject: [PATCH v3 2/3] dt-bindings: clk: add documentation for the SiFive PRCI driver
Date: Thu, 11 Apr 2019 01:27:34 -0700 [thread overview]
Message-ID: <20190411082733.3736-3-paul.walmsley@sifive.com> (raw)
In-Reply-To: <20190411082733.3736-2-paul.walmsley@sifive.com>
Add DT binding documentation for the Linux driver for the SiFive
PRCI clock & reset control IP block, as found on the SiFive
FU540 chip.
This version includes changes requested by Stephen Boyd
<sboyd@kernel.org> and Rob Herring <robh@kernel.org>, and
fixes some errors in the initial version.
Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Michael Turquette <mturquette@baylibre.com>
Cc: Stephen Boyd <sboyd@kernel.org>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Palmer Dabbelt <palmer@sifive.com>
Cc: Megan Wachs <megan@sifive.com>
Cc: linux-clk@vger.kernel.org
Cc: devicetree@vger.kernel.org
Cc: linux-riscv@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
---
.../bindings/clock/sifive/fu540-prci.txt | 46 +++++++++++++++++++
1 file changed, 46 insertions(+)
create mode 100644 Documentation/devicetree/bindings/clock/sifive/fu540-prci.txt
diff --git a/Documentation/devicetree/bindings/clock/sifive/fu540-prci.txt b/Documentation/devicetree/bindings/clock/sifive/fu540-prci.txt
new file mode 100644
index 000000000000..349808f4fb8c
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/sifive/fu540-prci.txt
@@ -0,0 +1,46 @@
+SiFive FU540 PRCI bindings
+
+On the FU540 family of SoCs, most system-wide clock and reset integration
+is via the PRCI IP block.
+
+Required properties:
+- compatible: Should be "sifive,<chip>-prci". Only one value is
+ supported: "sifive,fu540-c000-prci"
+- reg: Should describe the PRCI's register target physical address region
+- clocks: Should point to the hfclk device tree node and the rtcclk
+ device tree node. The RTC clock here is not a time-of-day clock,
+ but is instead a high-stability clock source for system timers
+ and cycle counters.
+- #clock-cells: Should be <1>
+
+The clock consumer should specify the desired clock via the clock ID
+macros defined in include/dt-bindings/clock/sifive-fu540-prci.h.
+These macros begin with PRCI_CLK_.
+
+The hfclk and rtcclk nodes are required, and represent physical
+crystals or resonators located on the PCB. These nodes should be present
+underneath /, rather than /soc.
+
+Examples:
+
+/* under /, in PCB-specific DT data */
+hfclk: hfclk {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <33333333>;
+ clock-output-names = "hfclk";
+};
+rtcclk: rtcclk {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <1000000>;
+ clock-output-names = "rtcclk";
+};
+
+/* under /soc, in SoC-specific DT data */
+prci: clock-controller@10000000 {
+ compatible = "sifive,fu540-c000-prci";
+ reg = <0x0 0x10000000 0x0 0x1000>;
+ clocks = <&hfclk>, <&rtcclk>;
+ #clock-cells = <1>;
+};
--
2.20.1
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
next prev parent reply other threads:[~2019-04-11 8:28 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-04-11 8:27 [PATCH v3 1/3] clk: analogbits: add Wide-Range PLL library Paul Walmsley
2019-04-11 8:27 ` Paul Walmsley [this message]
2019-04-26 21:44 ` [PATCH v3 2/3] dt-bindings: clk: add documentation for the SiFive PRCI driver Rob Herring
2019-04-29 22:56 ` Stephen Boyd
2019-04-11 8:27 ` [PATCH v3 3/3] clk: sifive: add a driver for the SiFive FU540 PRCI IP block Paul Walmsley
2019-04-28 1:50 ` Atish Patra
2019-04-30 6:20 ` Paul Walmsley
2019-04-30 7:01 ` Atish Patra
2019-04-29 22:56 ` Stephen Boyd
2019-04-27 1:01 ` [PATCH v3 1/3] clk: analogbits: add Wide-Range PLL library Stephen Boyd
2019-04-27 3:32 ` Paul Walmsley
2019-04-29 19:42 ` Paul Walmsley
2019-04-29 22:59 ` Stephen Boyd
2019-04-30 5:57 ` Paul Walmsley
2019-04-30 18:28 ` Stephen Boyd
2019-04-30 18:43 ` Paul Walmsley
2019-04-29 20:23 ` Stephen Boyd
2019-04-30 1:14 ` Paul Walmsley
2019-04-30 20:22 ` Stephen Boyd
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20190411082733.3736-3-paul.walmsley@sifive.com \
--to=paul.walmsley@sifive.com \
--cc=devicetree@vger.kernel.org \
--cc=linux-clk@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-riscv@lists.infradead.org \
--cc=mark.rutland@arm.com \
--cc=megan@sifive.com \
--cc=mturquette@baylibre.com \
--cc=palmer@sifive.com \
--cc=paul@pwsan.com \
--cc=robh+dt@kernel.org \
--cc=sboyd@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).