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From: Christoph Hellwig <hch@lst.de>
To: Vladimir Murzin <vladimir.murzin@arm.com>
Cc: Damien Le Moal <damien.lemoal@wdc.com>,
	uclinux-dev@uclinux.org, Palmer Dabbelt <palmer@sifive.com>,
	linux-kernel@vger.kernel.org, linux-mm@kvack.org,
	linux-riscv@lists.infradead.org, Christoph Hellwig <hch@lst.de>
Subject: Re: [PATCH 02/17] mm: stub out all of swapops.h for !CONFIG_MMU
Date: Fri, 14 Jun 2019 11:48:47 +0200
Message-ID: <20190614094847.GI17292@lst.de> (raw)
In-Reply-To: <80d01a1d-b6b0-18e8-811c-71af14cba3b9@arm.com>

On Tue, Jun 11, 2019 at 03:36:53PM +0100, Vladimir Murzin wrote:
> It looks like NOMMU ports tend to define those. For ARM they are:
> 
> #define __swp_type(x)           (0)
> #define __swp_offset(x)         (0)
> #define __swp_entry(typ,off)    ((swp_entry_t) { ((typ) | ((off) << 7)) })
> #define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
> #define __swp_entry_to_pte(x)   ((pte_t) { (x).val })
> 
> Anyway, I have no strong opinion on which is better :)

It just seems a lot easier to stub out swapops.h rather than providing
stubs in each arch so that inlines which we are never going to use can
build.  I can look into dropping this from the other nommu ports for
the next merge window, though.

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Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-06-10 22:16 RISC-V nommu support Christoph Hellwig
2019-06-10 22:16 ` [PATCH 01/17] mm: provide a print_vma_addr stub for !CONFIG_MMU Christoph Hellwig
2019-06-11 10:11   ` Vladimir Murzin
2019-06-10 22:16 ` [PATCH 02/17] mm: stub out all of swapops.h " Christoph Hellwig
2019-06-11 10:15   ` Vladimir Murzin
2019-06-11 14:18     ` Christoph Hellwig
2019-06-11 14:36       ` Vladimir Murzin
2019-06-14  9:48         ` Christoph Hellwig [this message]
2019-06-10 22:16 ` [PATCH 03/17] mm/nommu: fix the MAP_UNINITIALIZED flag Christoph Hellwig
2019-06-11 10:19   ` Vladimir Murzin
2019-06-10 22:16 ` [PATCH 04/17] irqchip/sifive-plic: set max threshold for ignored handlers Christoph Hellwig
2019-06-10 22:16 ` [PATCH 05/17] riscv: use CSR_SATP instead of the legacy sptbr name in switch_mm Christoph Hellwig
2019-06-10 22:16 ` [PATCH 06/17] riscv: clear the instruction cache and all registers when booting Christoph Hellwig
2019-06-10 22:16 ` [PATCH 07/17] riscv: refactor the IPI code Christoph Hellwig
2019-06-10 22:16 ` [PATCH 08/17] riscv: abstract out CSR names for supervisor vs machine mode Christoph Hellwig
2019-06-10 22:16 ` [PATCH 09/17] riscv: improve the default power off implementation Christoph Hellwig
2019-06-10 22:16 ` [PATCH 10/17] riscv: provide a flat entry loader Christoph Hellwig
2019-06-10 22:16 ` [PATCH 11/17] riscv: read hart ID from mhartid on boot Christoph Hellwig
2019-06-10 22:16 ` [PATCH 12/17] riscv: provide native clint access for M-mode Christoph Hellwig
2019-06-10 22:16 ` [PATCH 13/17] riscv: implement remote sfence.i natively " Christoph Hellwig
2019-06-10 22:16 ` [PATCH 14/17] riscv: poison SBI calls " Christoph Hellwig
2019-06-10 22:16 ` [PATCH 15/17] riscv: don't allow selecting SBI-based drivers " Christoph Hellwig
2019-06-10 22:16 ` [PATCH 16/17] riscv: use the correct interrupt levels " Christoph Hellwig
2019-06-10 22:16 ` [PATCH 17/17] riscv: add nommu support Christoph Hellwig
2019-06-11 10:32   ` Vladimir Murzin
2019-06-11 12:44   ` David Hildenbrand

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