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31 Jul 2019 17:56:38 -0700 IronPort-SDR: D1VyBwHI3DUdkTTZUMWdQnpNnOzsGERZEN5QbIDf+Y89fdGaTxP9sKHHLk1m6KTrqI3jYvCOC3 bCkxZlsYMtuY6KRf+3Yqfny58of2tXGpv+1nBcYrz2dg+559EPzcAiGE029FLbqjc1NIejCJWs TeyPbP/s0dajWY0cJv8Dobe6WiCaS1Pve9JQmZViFJAvaY30yPpSUASBWJFBA8cL7WEst0AuXj JSmO9A1YKvlFvfZVhpX1SfSM5R0qDm1UmWFjeLdQmakFKkFePnHvub5SYqi80wMJsNX0EgXmM2 +VE= Received: from jedi-01.sdcorp.global.sandisk.com (HELO jedi-01.int.fusionio.com) ([10.11.143.218]) by uls-op-cesaip01.wdc.com with ESMTP; 31 Jul 2019 17:58:37 -0700 From: Atish Patra To: linux-kernel@vger.kernel.org Subject: [PATCH v3 1/5] RISC-V: Remove per cpu clocksource Date: Wed, 31 Jul 2019 17:58:39 -0700 Message-Id: <20190801005843.10343-2-atish.patra@wdc.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190801005843.10343-1-atish.patra@wdc.com> References: <20190801005843.10343-1-atish.patra@wdc.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190731_175843_399568_F0C20332 X-CRM114-Status: GOOD ( 11.14 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , devicetree@vger.kernel.org, Albert Ou , Daniel Lezcano , Yangtao Li , Greg Kroah-Hartman , Anup Patel , Johan Hovold , Atish Patra , Rob Herring , Palmer Dabbelt , Gary Guo , Paul Walmsley , linux-riscv@lists.infradead.org, Enrico Weigelt , Thomas Gleixner , Allison Randal Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+infradead-linux-riscv=archiver.kernel.org@lists.infradead.org There is only one clocksource in RISC-V. The boot cpu initializes that clocksource. No need to keep a percpu data structure. Signed-off-by: Atish Patra --- drivers/clocksource/timer-riscv.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/drivers/clocksource/timer-riscv.c b/drivers/clocksource/timer-riscv.c index 5e6038fbf115..09e031176bc6 100644 --- a/drivers/clocksource/timer-riscv.c +++ b/drivers/clocksource/timer-riscv.c @@ -55,7 +55,7 @@ static u64 riscv_sched_clock(void) return get_cycles64(); } -static DEFINE_PER_CPU(struct clocksource, riscv_clocksource) = { +static struct clocksource riscv_clocksource = { .name = "riscv_clocksource", .rating = 300, .mask = CLOCKSOURCE_MASK(64), @@ -92,7 +92,6 @@ void riscv_timer_interrupt(void) static int __init riscv_timer_init_dt(struct device_node *n) { int cpuid, hartid, error; - struct clocksource *cs; hartid = riscv_of_processor_hartid(n); if (hartid < 0) { @@ -112,8 +111,7 @@ static int __init riscv_timer_init_dt(struct device_node *n) pr_info("%s: Registering clocksource cpuid [%d] hartid [%d]\n", __func__, cpuid, hartid); - cs = per_cpu_ptr(&riscv_clocksource, cpuid); - error = clocksource_register_hz(cs, riscv_timebase); + error = clocksource_register_hz(&riscv_clocksource, riscv_timebase); if (error) { pr_err("RISCV timer register failed [%d] for cpu = [%d]\n", error, cpuid); -- 2.21.0 _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv