* [PATCH v2 0/3] Add support for SBI v0.2
@ 2019-09-27 0:09 Atish Patra
2019-09-27 0:09 ` [PATCH v2 1/3] RISC-V: Mark existing SBI as 0.1 SBI Atish Patra
` (3 more replies)
0 siblings, 4 replies; 16+ messages in thread
From: Atish Patra @ 2019-09-27 0:09 UTC (permalink / raw)
To: linux-kernel
Cc: Albert Ou, Alan Kao, Anup Patel, Palmer Dabbelt, Mike Rapoport,
Paul Walmsley, Atish Patra, Gary Guo, Greg Kroah-Hartman,
linux-riscv, Thomas Gleixner, Allison Randal
The Supervisor Binary Interface(SBI) specification[1] now defines a
base extension that provides extendability to add future extensions
while maintaining backward compatibility with previous versions.
The new version is defined as 0.2 and older version is marked as 0.1.
This series adds support v0.2 and a unified calling convention
implementation between 0.1 and 0.2. It also adds minimal SBI functions
from 0.2 as well to keep the series lean.
[1] https://github.com/riscv/riscv-sbi-doc/blob/master/riscv-sbi.adoc
The SBI v0.2 support for OpenSBI is already available at
https://github.com/atishp04/opensbi/tree/sbi_v0.2_2
and in the OpenSBI mailing list.
Tested on both BBL, OpenSBI with/without the above patch series.
Changes from v1->v2
1. Removed the legacy calling convention.
2. Moved all SBI related calls to sbi.c.
3. Moved all SBI related macros to uapi.
Atish Patra (3):
RISC-V: Mark existing SBI as 0.1 SBI.
RISC-V: Add basic support for SBI v0.2
RISC-V: Move SBI related macros under uapi.
arch/riscv/include/asm/sbi.h | 109 +++++---------
arch/riscv/include/uapi/asm/sbi.h | 48 ++++++
arch/riscv/kernel/Makefile | 1 +
arch/riscv/kernel/sbi.c | 241 ++++++++++++++++++++++++++++++
arch/riscv/kernel/setup.c | 2 +
5 files changed, 328 insertions(+), 73 deletions(-)
create mode 100644 arch/riscv/include/uapi/asm/sbi.h
create mode 100644 arch/riscv/kernel/sbi.c
--
2.21.0
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply [flat|nested] 16+ messages in thread* [PATCH v2 1/3] RISC-V: Mark existing SBI as 0.1 SBI. 2019-09-27 0:09 [PATCH v2 0/3] Add support for SBI v0.2 Atish Patra @ 2019-09-27 0:09 ` Atish Patra 2019-09-27 5:47 ` Anup Patel 2019-09-27 22:19 ` Christoph Hellwig 2019-09-27 0:09 ` [PATCH v2 2/3] RISC-V: Add basic support for SBI v0.2 Atish Patra ` (2 subsequent siblings) 3 siblings, 2 replies; 16+ messages in thread From: Atish Patra @ 2019-09-27 0:09 UTC (permalink / raw) To: linux-kernel Cc: Albert Ou, Alan Kao, Anup Patel, Palmer Dabbelt, Mike Rapoport, Paul Walmsley, Atish Patra, Gary Guo, Greg Kroah-Hartman, linux-riscv, Thomas Gleixner, Allison Randal As per the new SBI specification, current SBI implementation version is defined as 0.1 and will be removed/replaced in future. Each of the function call in 0.1 is defined as a separate extension which makes easier to replace them one at a time. Rename existing implementation to reflect that. This patch is just a preparatory patch for SBI v0.2 and doesn't introduce any functional changes. Signed-off-by: Atish Patra <atish.patra@wdc.com> --- arch/riscv/include/asm/sbi.h | 43 +++++++++++++++++++----------------- 1 file changed, 23 insertions(+), 20 deletions(-) diff --git a/arch/riscv/include/asm/sbi.h b/arch/riscv/include/asm/sbi.h index 21134b3ef404..2147f384fad0 100644 --- a/arch/riscv/include/asm/sbi.h +++ b/arch/riscv/include/asm/sbi.h @@ -8,17 +8,17 @@ #include <linux/types.h> -#define SBI_SET_TIMER 0 -#define SBI_CONSOLE_PUTCHAR 1 -#define SBI_CONSOLE_GETCHAR 2 -#define SBI_CLEAR_IPI 3 -#define SBI_SEND_IPI 4 -#define SBI_REMOTE_FENCE_I 5 -#define SBI_REMOTE_SFENCE_VMA 6 -#define SBI_REMOTE_SFENCE_VMA_ASID 7 -#define SBI_SHUTDOWN 8 +#define SBI_EXT_0_1_SET_TIMER 0x0 +#define SBI_EXT_0_1_CONSOLE_PUTCHAR 0x1 +#define SBI_EXT_0_1_CONSOLE_GETCHAR 0x2 +#define SBI_EXT_0_1_CLEAR_IPI 0x3 +#define SBI_EXT_0_1_SEND_IPI 0x4 +#define SBI_EXT_0_1_REMOTE_FENCE_I 0x5 +#define SBI_EXT_0_1_REMOTE_SFENCE_VMA 0x6 +#define SBI_EXT_0_1_REMOTE_SFENCE_VMA_ASID 0x7 +#define SBI_EXT_0_1_SHUTDOWN 0x8 -#define SBI_CALL(which, arg0, arg1, arg2, arg3) ({ \ +#define SBI_CALL(which, arg0, arg1, arg2, arg3) ({ \ register uintptr_t a0 asm ("a0") = (uintptr_t)(arg0); \ register uintptr_t a1 asm ("a1") = (uintptr_t)(arg1); \ register uintptr_t a2 asm ("a2") = (uintptr_t)(arg2); \ @@ -42,48 +42,50 @@ static inline void sbi_console_putchar(int ch) { - SBI_CALL_1(SBI_CONSOLE_PUTCHAR, ch); + SBI_CALL_1(SBI_EXT_0_1_CONSOLE_PUTCHAR, ch); } static inline int sbi_console_getchar(void) { - return SBI_CALL_0(SBI_CONSOLE_GETCHAR); + return SBI_CALL_0(SBI_EXT_0_1_CONSOLE_GETCHAR); } static inline void sbi_set_timer(uint64_t stime_value) { #if __riscv_xlen == 32 - SBI_CALL_2(SBI_SET_TIMER, stime_value, stime_value >> 32); + SBI_CALL_2(SBI_EXT_0_1_SET_TIMER, stime_value, + stime_value >> 32); #else - SBI_CALL_1(SBI_SET_TIMER, stime_value); + SBI_CALL_1(SBI_EXT_0_1_SET_TIMER, stime_value); #endif } static inline void sbi_shutdown(void) { - SBI_CALL_0(SBI_SHUTDOWN); + SBI_CALL_0(SBI_EXT_0_1_SHUTDOWN); } static inline void sbi_clear_ipi(void) { - SBI_CALL_0(SBI_CLEAR_IPI); + SBI_CALL_0(SBI_EXT_0_1_CLEAR_IPI); } static inline void sbi_send_ipi(const unsigned long *hart_mask) { - SBI_CALL_1(SBI_SEND_IPI, hart_mask); + SBI_CALL_1(SBI_EXT_0_1_SEND_IPI, hart_mask); } static inline void sbi_remote_fence_i(const unsigned long *hart_mask) { - SBI_CALL_1(SBI_REMOTE_FENCE_I, hart_mask); + SBI_CALL_1(SBI_EXT_0_1_REMOTE_FENCE_I, hart_mask); } static inline void sbi_remote_sfence_vma(const unsigned long *hart_mask, unsigned long start, unsigned long size) { - SBI_CALL_3(SBI_REMOTE_SFENCE_VMA, hart_mask, start, size); + SBI_CALL_3(SBI_EXT_0_1_REMOTE_SFENCE_VMA, hart_mask, + start, size); } static inline void sbi_remote_sfence_vma_asid(const unsigned long *hart_mask, @@ -91,7 +93,8 @@ static inline void sbi_remote_sfence_vma_asid(const unsigned long *hart_mask, unsigned long size, unsigned long asid) { - SBI_CALL_4(SBI_REMOTE_SFENCE_VMA_ASID, hart_mask, start, size, asid); + SBI_CALL_4(SBI_EXT_0_1_REMOTE_SFENCE_VMA_ASID, hart_mask, + start, size, asid); } #endif -- 2.21.0 _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv ^ permalink raw reply related [flat|nested] 16+ messages in thread
* Re: [PATCH v2 1/3] RISC-V: Mark existing SBI as 0.1 SBI. 2019-09-27 0:09 ` [PATCH v2 1/3] RISC-V: Mark existing SBI as 0.1 SBI Atish Patra @ 2019-09-27 5:47 ` Anup Patel 2019-09-27 22:19 ` Christoph Hellwig 1 sibling, 0 replies; 16+ messages in thread From: Anup Patel @ 2019-09-27 5:47 UTC (permalink / raw) To: Atish Patra Cc: Albert Ou, Alan Kao, Greg Kroah-Hartman, Palmer Dabbelt, linux-kernel@vger.kernel.org List, Mike Rapoport, Gary Guo, Paul Walmsley, linux-riscv, Thomas Gleixner, Allison Randal On Fri, Sep 27, 2019 at 5:39 AM Atish Patra <atish.patra@wdc.com> wrote: > > As per the new SBI specification, current SBI implementation version > is defined as 0.1 and will be removed/replaced in future. Each of the > function call in 0.1 is defined as a separate extension which makes > easier to replace them one at a time. > > Rename existing implementation to reflect that. This patch is just > a preparatory patch for SBI v0.2 and doesn't introduce any functional > changes. > > Signed-off-by: Atish Patra <atish.patra@wdc.com> > --- > arch/riscv/include/asm/sbi.h | 43 +++++++++++++++++++----------------- > 1 file changed, 23 insertions(+), 20 deletions(-) > > diff --git a/arch/riscv/include/asm/sbi.h b/arch/riscv/include/asm/sbi.h > index 21134b3ef404..2147f384fad0 100644 > --- a/arch/riscv/include/asm/sbi.h > +++ b/arch/riscv/include/asm/sbi.h > @@ -8,17 +8,17 @@ > > #include <linux/types.h> > > -#define SBI_SET_TIMER 0 > -#define SBI_CONSOLE_PUTCHAR 1 > -#define SBI_CONSOLE_GETCHAR 2 > -#define SBI_CLEAR_IPI 3 > -#define SBI_SEND_IPI 4 > -#define SBI_REMOTE_FENCE_I 5 > -#define SBI_REMOTE_SFENCE_VMA 6 > -#define SBI_REMOTE_SFENCE_VMA_ASID 7 > -#define SBI_SHUTDOWN 8 > +#define SBI_EXT_0_1_SET_TIMER 0x0 > +#define SBI_EXT_0_1_CONSOLE_PUTCHAR 0x1 > +#define SBI_EXT_0_1_CONSOLE_GETCHAR 0x2 > +#define SBI_EXT_0_1_CLEAR_IPI 0x3 > +#define SBI_EXT_0_1_SEND_IPI 0x4 > +#define SBI_EXT_0_1_REMOTE_FENCE_I 0x5 > +#define SBI_EXT_0_1_REMOTE_SFENCE_VMA 0x6 > +#define SBI_EXT_0_1_REMOTE_SFENCE_VMA_ASID 0x7 > +#define SBI_EXT_0_1_SHUTDOWN 0x8 > > -#define SBI_CALL(which, arg0, arg1, arg2, arg3) ({ \ > +#define SBI_CALL(which, arg0, arg1, arg2, arg3) ({ \ > register uintptr_t a0 asm ("a0") = (uintptr_t)(arg0); \ > register uintptr_t a1 asm ("a1") = (uintptr_t)(arg1); \ > register uintptr_t a2 asm ("a2") = (uintptr_t)(arg2); \ > @@ -42,48 +42,50 @@ > > static inline void sbi_console_putchar(int ch) > { > - SBI_CALL_1(SBI_CONSOLE_PUTCHAR, ch); > + SBI_CALL_1(SBI_EXT_0_1_CONSOLE_PUTCHAR, ch); > } > > static inline int sbi_console_getchar(void) > { > - return SBI_CALL_0(SBI_CONSOLE_GETCHAR); > + return SBI_CALL_0(SBI_EXT_0_1_CONSOLE_GETCHAR); > } > > static inline void sbi_set_timer(uint64_t stime_value) > { > #if __riscv_xlen == 32 > - SBI_CALL_2(SBI_SET_TIMER, stime_value, stime_value >> 32); > + SBI_CALL_2(SBI_EXT_0_1_SET_TIMER, stime_value, > + stime_value >> 32); > #else > - SBI_CALL_1(SBI_SET_TIMER, stime_value); > + SBI_CALL_1(SBI_EXT_0_1_SET_TIMER, stime_value); > #endif > } > > static inline void sbi_shutdown(void) > { > - SBI_CALL_0(SBI_SHUTDOWN); > + SBI_CALL_0(SBI_EXT_0_1_SHUTDOWN); > } > > static inline void sbi_clear_ipi(void) > { > - SBI_CALL_0(SBI_CLEAR_IPI); > + SBI_CALL_0(SBI_EXT_0_1_CLEAR_IPI); > } > > static inline void sbi_send_ipi(const unsigned long *hart_mask) > { > - SBI_CALL_1(SBI_SEND_IPI, hart_mask); > + SBI_CALL_1(SBI_EXT_0_1_SEND_IPI, hart_mask); > } > > static inline void sbi_remote_fence_i(const unsigned long *hart_mask) > { > - SBI_CALL_1(SBI_REMOTE_FENCE_I, hart_mask); > + SBI_CALL_1(SBI_EXT_0_1_REMOTE_FENCE_I, hart_mask); > } > > static inline void sbi_remote_sfence_vma(const unsigned long *hart_mask, > unsigned long start, > unsigned long size) > { > - SBI_CALL_3(SBI_REMOTE_SFENCE_VMA, hart_mask, start, size); > + SBI_CALL_3(SBI_EXT_0_1_REMOTE_SFENCE_VMA, hart_mask, > + start, size); > } > > static inline void sbi_remote_sfence_vma_asid(const unsigned long *hart_mask, > @@ -91,7 +93,8 @@ static inline void sbi_remote_sfence_vma_asid(const unsigned long *hart_mask, > unsigned long size, > unsigned long asid) > { > - SBI_CALL_4(SBI_REMOTE_SFENCE_VMA_ASID, hart_mask, start, size, asid); > + SBI_CALL_4(SBI_EXT_0_1_REMOTE_SFENCE_VMA_ASID, hart_mask, > + start, size, asid); > } > > #endif > -- > 2.21.0 > LGTM. Reviewed-by: Anup Patel <anup@brainfault.org> Regards, Anup _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv ^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH v2 1/3] RISC-V: Mark existing SBI as 0.1 SBI. 2019-09-27 0:09 ` [PATCH v2 1/3] RISC-V: Mark existing SBI as 0.1 SBI Atish Patra 2019-09-27 5:47 ` Anup Patel @ 2019-09-27 22:19 ` Christoph Hellwig 1 sibling, 0 replies; 16+ messages in thread From: Christoph Hellwig @ 2019-09-27 22:19 UTC (permalink / raw) To: Atish Patra Cc: Albert Ou, Alan Kao, Greg Kroah-Hartman, Anup Patel, Palmer Dabbelt, linux-kernel, Mike Rapoport, Gary Guo, Paul Walmsley, linux-riscv, Thomas Gleixner, Allison Randal On Thu, Sep 26, 2019 at 05:09:13PM -0700, Atish Patra wrote: > -#define SBI_CALL(which, arg0, arg1, arg2, arg3) ({ \ > +#define SBI_CALL(which, arg0, arg1, arg2, arg3) ({ \ Spurious whitespace change. _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv ^ permalink raw reply [flat|nested] 16+ messages in thread
* [PATCH v2 2/3] RISC-V: Add basic support for SBI v0.2 2019-09-27 0:09 [PATCH v2 0/3] Add support for SBI v0.2 Atish Patra 2019-09-27 0:09 ` [PATCH v2 1/3] RISC-V: Mark existing SBI as 0.1 SBI Atish Patra @ 2019-09-27 0:09 ` Atish Patra 2019-09-27 5:47 ` Anup Patel 2019-10-03 5:18 ` Anup Patel 2019-09-27 0:09 ` [PATCH v2 3/3] RISC-V: Move SBI related macros under uapi Atish Patra 2019-09-27 22:19 ` [PATCH v2 0/3] Add support for SBI v0.2 Christoph Hellwig 3 siblings, 2 replies; 16+ messages in thread From: Atish Patra @ 2019-09-27 0:09 UTC (permalink / raw) To: linux-kernel Cc: Albert Ou, Alan Kao, Anup Patel, Palmer Dabbelt, Mike Rapoport, Paul Walmsley, Atish Patra, Gary Guo, Greg Kroah-Hartman, linux-riscv, Thomas Gleixner, Allison Randal The SBI v0.2 introduces a base extension which is backward compatible with v0.1. Implement all helper functions and minimum required SBI calls from v0.2 for now. All other base extension function will be added later as per need. As v0.2 calling convention is backward compatible with v0.1, remove the v0.1 helper functions and just use v0.2 calling convention. Signed-off-by: Atish Patra <atish.patra@wdc.com> --- arch/riscv/include/asm/sbi.h | 139 ++++++++++---------- arch/riscv/kernel/Makefile | 1 + arch/riscv/kernel/sbi.c | 241 +++++++++++++++++++++++++++++++++++ arch/riscv/kernel/setup.c | 2 + 4 files changed, 311 insertions(+), 72 deletions(-) create mode 100644 arch/riscv/kernel/sbi.c diff --git a/arch/riscv/include/asm/sbi.h b/arch/riscv/include/asm/sbi.h index 2147f384fad0..279b7f10b3c2 100644 --- a/arch/riscv/include/asm/sbi.h +++ b/arch/riscv/include/asm/sbi.h @@ -8,93 +8,88 @@ #include <linux/types.h> -#define SBI_EXT_0_1_SET_TIMER 0x0 -#define SBI_EXT_0_1_CONSOLE_PUTCHAR 0x1 -#define SBI_EXT_0_1_CONSOLE_GETCHAR 0x2 -#define SBI_EXT_0_1_CLEAR_IPI 0x3 -#define SBI_EXT_0_1_SEND_IPI 0x4 -#define SBI_EXT_0_1_REMOTE_FENCE_I 0x5 -#define SBI_EXT_0_1_REMOTE_SFENCE_VMA 0x6 -#define SBI_EXT_0_1_REMOTE_SFENCE_VMA_ASID 0x7 -#define SBI_EXT_0_1_SHUTDOWN 0x8 +enum sbi_ext_id { + SBI_EXT_0_1_SET_TIMER = 0x0, + SBI_EXT_0_1_CONSOLE_PUTCHAR = 0x1, + SBI_EXT_0_1_CONSOLE_GETCHAR = 0x2, + SBI_EXT_0_1_CLEAR_IPI = 0x3, + SBI_EXT_0_1_SEND_IPI = 0x4, + SBI_EXT_0_1_REMOTE_FENCE_I = 0x5, + SBI_EXT_0_1_REMOTE_SFENCE_VMA = 0x6, + SBI_EXT_0_1_REMOTE_SFENCE_VMA_ASID = 0x7, + SBI_EXT_0_1_SHUTDOWN = 0x8, + SBI_EXT_BASE = 0x10, +}; -#define SBI_CALL(which, arg0, arg1, arg2, arg3) ({ \ - register uintptr_t a0 asm ("a0") = (uintptr_t)(arg0); \ - register uintptr_t a1 asm ("a1") = (uintptr_t)(arg1); \ - register uintptr_t a2 asm ("a2") = (uintptr_t)(arg2); \ - register uintptr_t a3 asm ("a3") = (uintptr_t)(arg3); \ - register uintptr_t a7 asm ("a7") = (uintptr_t)(which); \ - asm volatile ("ecall" \ - : "+r" (a0) \ - : "r" (a1), "r" (a2), "r" (a3), "r" (a7) \ - : "memory"); \ - a0; \ -}) +enum sbi_ext_base_fid { + SBI_BASE_GET_SPEC_VERSION = 0, + SBI_BASE_GET_IMP_ID, + SBI_BASE_GET_IMP_VERSION, + SBI_BASE_PROBE_EXT, + SBI_BASE_GET_MVENDORID, + SBI_BASE_GET_MARCHID, + SBI_BASE_GET_MIMPID, +}; -/* Lazy implementations until SBI is finalized */ -#define SBI_CALL_0(which) SBI_CALL(which, 0, 0, 0, 0) -#define SBI_CALL_1(which, arg0) SBI_CALL(which, arg0, 0, 0, 0) -#define SBI_CALL_2(which, arg0, arg1) SBI_CALL(which, arg0, arg1, 0, 0) -#define SBI_CALL_3(which, arg0, arg1, arg2) \ - SBI_CALL(which, arg0, arg1, arg2, 0) -#define SBI_CALL_4(which, arg0, arg1, arg2, arg3) \ - SBI_CALL(which, arg0, arg1, arg2, arg3) +#define SBI_SPEC_VERSION_DEFAULT 0x1 +#define SBI_SPEC_VERSION_MAJOR_OFFSET 24 +#define SBI_SPEC_VERSION_MAJOR_MASK 0x7f +#define SBI_SPEC_VERSION_MINOR_MASK 0xffffff -static inline void sbi_console_putchar(int ch) -{ - SBI_CALL_1(SBI_EXT_0_1_CONSOLE_PUTCHAR, ch); -} +/* SBI return error codes */ +#define SBI_SUCCESS 0 +#define SBI_ERR_FAILURE -1 +#define SBI_ERR_NOT_SUPPORTED -2 +#define SBI_ERR_INVALID_PARAM -3 +#define SBI_ERR_DENIED -4 +#define SBI_ERR_INVALID_ADDRESS -5 -static inline int sbi_console_getchar(void) -{ - return SBI_CALL_0(SBI_EXT_0_1_CONSOLE_GETCHAR); -} - -static inline void sbi_set_timer(uint64_t stime_value) -{ -#if __riscv_xlen == 32 - SBI_CALL_2(SBI_EXT_0_1_SET_TIMER, stime_value, - stime_value >> 32); -#else - SBI_CALL_1(SBI_EXT_0_1_SET_TIMER, stime_value); -#endif -} +extern unsigned long sbi_spec_version; +struct sbiret { + long error; + long value; +}; -static inline void sbi_shutdown(void) -{ - SBI_CALL_0(SBI_EXT_0_1_SHUTDOWN); -} +void sbi_init(void); +struct sbiret sbi_ecall(int ext, int fid, unsigned long arg0, + unsigned long arg1, unsigned long arg2, + unsigned long arg3); +int sbi_err_map_linux_errorno(int err); -static inline void sbi_clear_ipi(void) -{ - SBI_CALL_0(SBI_EXT_0_1_CLEAR_IPI); -} +void sbi_console_putchar(int ch); +int sbi_console_getchar(void); +void sbi_set_timer(uint64_t stime_value); +void sbi_shutdown(void); +void sbi_clear_ipi(void); +void sbi_send_ipi(const unsigned long *hart_mask); +void sbi_remote_fence_i(const unsigned long *hart_mask); +void sbi_remote_sfence_vma(const unsigned long *hart_mask, + unsigned long start, + unsigned long size); -static inline void sbi_send_ipi(const unsigned long *hart_mask) -{ - SBI_CALL_1(SBI_EXT_0_1_SEND_IPI, hart_mask); -} +void sbi_remote_sfence_vma_asid(const unsigned long *hart_mask, + unsigned long start, + unsigned long size, + unsigned long asid); +int sbi_probe_extension(long ext); -static inline void sbi_remote_fence_i(const unsigned long *hart_mask) +/* Check if current SBI specification version is 0.1 or not */ +static inline int sbi_spec_is_0_1(void) { - SBI_CALL_1(SBI_EXT_0_1_REMOTE_FENCE_I, hart_mask); + return (sbi_spec_version == SBI_SPEC_VERSION_DEFAULT) ? 1 : 0; } -static inline void sbi_remote_sfence_vma(const unsigned long *hart_mask, - unsigned long start, - unsigned long size) +/* Get the major version of SBI */ +static inline unsigned long sbi_major_version(void) { - SBI_CALL_3(SBI_EXT_0_1_REMOTE_SFENCE_VMA, hart_mask, - start, size); + return (sbi_spec_version >> SBI_SPEC_VERSION_MAJOR_OFFSET) & + SBI_SPEC_VERSION_MAJOR_MASK; } -static inline void sbi_remote_sfence_vma_asid(const unsigned long *hart_mask, - unsigned long start, - unsigned long size, - unsigned long asid) +/* Get the minor version of SBI */ +static inline unsigned long sbi_minor_version(void) { - SBI_CALL_4(SBI_EXT_0_1_REMOTE_SFENCE_VMA_ASID, hart_mask, - start, size, asid); + return sbi_spec_version & SBI_SPEC_VERSION_MINOR_MASK; } #endif diff --git a/arch/riscv/kernel/Makefile b/arch/riscv/kernel/Makefile index 2420d37d96de..faf862d26924 100644 --- a/arch/riscv/kernel/Makefile +++ b/arch/riscv/kernel/Makefile @@ -17,6 +17,7 @@ obj-y += irq.o obj-y += process.o obj-y += ptrace.o obj-y += reset.o +obj-y += sbi.o obj-y += setup.o obj-y += signal.o obj-y += syscall_table.o diff --git a/arch/riscv/kernel/sbi.c b/arch/riscv/kernel/sbi.c new file mode 100644 index 000000000000..315fcb925278 --- /dev/null +++ b/arch/riscv/kernel/sbi.c @@ -0,0 +1,241 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (c) 2019 Western Digital Corporation or its affiliates. + */ + +#include <asm/sbi.h> +#include <linux/sched.h> + +/* default SBI version is 0.1 */ +unsigned long sbi_spec_version = SBI_SPEC_VERSION_DEFAULT; + +struct sbiret sbi_ecall(int ext, int fid, unsigned long arg0, + unsigned long arg1, unsigned long arg2, + unsigned long arg3) +{ + struct sbiret ret; + + register uintptr_t a0 asm ("a0") = (uintptr_t)(arg0); + register uintptr_t a1 asm ("a1") = (uintptr_t)(arg1); + register uintptr_t a2 asm ("a2") = (uintptr_t)(arg2); + register uintptr_t a3 asm ("a3") = (uintptr_t)(arg3); + register uintptr_t a6 asm ("a6") = (uintptr_t)(fid); + register uintptr_t a7 asm ("a7") = (uintptr_t)(ext); + asm volatile ("ecall" + : "+r" (a0), "+r" (a1) + : "r" (a2), "r" (a3), "r" (a6), "r" (a7) + : "memory"); + ret.error = a0; + ret.value = a1; + + return ret; +} + +int sbi_err_map_linux_errno(int err) +{ + switch (err) { + case SBI_SUCCESS: + return 0; + case SBI_ERR_DENIED: + return -EPERM; + case SBI_ERR_INVALID_PARAM: + return -EINVAL; + case SBI_ERR_INVALID_ADDRESS: + return -EFAULT; + case SBI_ERR_NOT_SUPPORTED: + case SBI_ERR_FAILURE: + default: + return -ENOTSUPP; + }; +} + +/** + * sbi_console_putchar() - Writes given character to the console device. + * @ch: The data to be written to the console. + * + * Return: None + */ +void sbi_console_putchar(int ch) +{ + sbi_ecall(SBI_EXT_0_1_CONSOLE_PUTCHAR, 0, ch, 0, 0, 0); +} + +/** + * sbi_console_getchar() - Reads a byte from console device. + * + * Returns the value read from console. + */ +int sbi_console_getchar(void) +{ + struct sbiret ret; + + ret = sbi_ecall(SBI_EXT_0_1_CONSOLE_GETCHAR, 0, 0, 0, 0, 0); + + return ret.error; +} + +/** + * sbi_set_timer() - Program the timer for next timer event. + * @stime_value: The value after which next timer event should fire. + * + * Return: None + */ +void sbi_set_timer(uint64_t stime_value) +{ +#if __riscv_xlen == 32 + sbi_ecall(SBI_EXT_0_1_SET_TIMER, 0, stime_value, + stime_value >> 32, 0, 0); +#else + sbi_ecall(SBI_EXT_0_1_SET_TIMER, 0, stime_value, 0, 0, 0); +#endif +} + +/** + * sbi_shutdown() - Remove all the harts from executing supervisor code. + * + * Return: None + */ +void sbi_shutdown(void) +{ + sbi_ecall(SBI_EXT_0_1_SHUTDOWN, 0, 0, 0, 0, 0); +} + +/** + * sbi_clear_ipi() - Clear any pending IPIs for the calling hart. + * + * Return: None + */ +void sbi_clear_ipi(void) +{ + sbi_ecall(SBI_EXT_0_1_CLEAR_IPI, 0, 0, 0, 0, 0); +} + +/** + * sbi_send_ipi() - Send an IPI to any hart. + * @hart_mask: A cpu mask containing all the target harts. + * + * Return: None + */ +void sbi_send_ipi(const unsigned long *hart_mask) +{ + sbi_ecall(SBI_EXT_0_1_SEND_IPI, 0, (unsigned long)hart_mask, + 0, 0, 0); +} + +/** + * sbi_remote_fence_i() - Execute FENCE.I instruction on given remote harts. + * @hart_mask: A cpu mask containing all the target harts. + * + * Return: None + */ +void sbi_remote_fence_i(const unsigned long *hart_mask) +{ + sbi_ecall(SBI_EXT_0_1_REMOTE_FENCE_I, 0, (unsigned long)hart_mask, + 0, 0, 0); +} + +/** + * sbi_remote_sfence_vma() - Execute SFENCE.VMA instructions on given remote + * harts for the specified virtual address range. + * @hart_mask: A cpu mask containing all the target harts. + * @start: Start of the virtual address + * @size: Total size of the virtual address range. + * + * Return: None + */ +void sbi_remote_sfence_vma(const unsigned long *hart_mask, + unsigned long start, + unsigned long size) +{ + sbi_ecall(SBI_EXT_0_1_REMOTE_SFENCE_VMA, 0, + (unsigned long)hart_mask, start, size, 0); +} + +/** + * sbi_remote_sfence_vma_asid() - Execute SFENCE.VMA instructions on given + * remote harts for a virtual address range belonging to a specific ASID. + * + * @hart_mask: A cpu mask containing all the target harts. + * @start: Start of the virtual address + * @size: Total size of the virtual address range. + * @asid: The value of address space identifier (ASID). + * + * Return: None + */ +void sbi_remote_sfence_vma_asid(const unsigned long *hart_mask, + unsigned long start, + unsigned long size, + unsigned long asid) +{ + sbi_ecall(SBI_EXT_0_1_REMOTE_SFENCE_VMA_ASID, 0, + (unsigned long)hart_mask, start, size, asid); +} + +/** + * sbi_probe_extension() - Check if an SBI extension ID is supported or not. + * @extid: The extension ID to be probed. + * + * Return: Extension specific nonzero value if yes, -ENOTSUPP otherwise. + */ +int sbi_probe_extension(long extid) +{ + struct sbiret ret; + + ret = sbi_ecall(SBI_EXT_BASE, SBI_BASE_PROBE_EXT, 0, 0, 0, 0); + if (!ret.error) + if (ret.value) + return ret.value; + + return -ENOTSUPP; +} + +static long sbi_get_spec_version(void) +{ + struct sbiret ret; + + ret = sbi_ecall(SBI_EXT_BASE, SBI_BASE_GET_SPEC_VERSION, + 0, 0, 0, 0); + if (!ret.error) + return ret.value; + else + return ret.error; +} + +static long sbi_get_firmware_id(void) +{ + struct sbiret ret; + + ret = sbi_ecall(SBI_EXT_BASE, SBI_BASE_GET_IMP_ID, + 0, 0, 0, 0); + if (!ret.error) + return ret.value; + else + return sbi_err_map_linux_errno(ret.error); +} + +static long sbi_get_firmware_version(void) +{ + struct sbiret ret; + + ret = sbi_ecall(SBI_EXT_BASE, SBI_BASE_GET_IMP_VERSION, + 0, 0, 0, 0); + if (!ret.error) + return ret.value; + else + return sbi_err_map_linux_errno(ret.error); +} + +void sbi_init(void) +{ + int ret; + + ret = sbi_get_spec_version(); + if (ret > 0) + sbi_spec_version = ret; + + pr_info("SBI specification v%lu.%lu detected\n", + sbi_major_version(), sbi_minor_version()); + if (!sbi_spec_is_0_1()) + pr_info("SBI implementation ID=0x%lx Version=0x%lx\n", + sbi_get_firmware_id(), sbi_get_firmware_version()); +} diff --git a/arch/riscv/kernel/setup.c b/arch/riscv/kernel/setup.c index a990a6cb184f..abf2b9ee5307 100644 --- a/arch/riscv/kernel/setup.c +++ b/arch/riscv/kernel/setup.c @@ -21,6 +21,7 @@ #include <asm/sections.h> #include <asm/pgtable.h> #include <asm/smp.h> +#include <asm/sbi.h> #include <asm/tlbflush.h> #include <asm/thread_info.h> @@ -70,6 +71,7 @@ void __init setup_arch(char **cmdline_p) swiotlb_init(1); #endif + sbi_init(); #ifdef CONFIG_SMP setup_smp(); #endif -- 2.21.0 _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv ^ permalink raw reply related [flat|nested] 16+ messages in thread
* Re: [PATCH v2 2/3] RISC-V: Add basic support for SBI v0.2 2019-09-27 0:09 ` [PATCH v2 2/3] RISC-V: Add basic support for SBI v0.2 Atish Patra @ 2019-09-27 5:47 ` Anup Patel 2019-10-03 5:18 ` Anup Patel 1 sibling, 0 replies; 16+ messages in thread From: Anup Patel @ 2019-09-27 5:47 UTC (permalink / raw) To: Atish Patra Cc: Albert Ou, Alan Kao, Greg Kroah-Hartman, Palmer Dabbelt, linux-kernel@vger.kernel.org List, Mike Rapoport, Gary Guo, Paul Walmsley, linux-riscv, Thomas Gleixner, Allison Randal On Fri, Sep 27, 2019 at 5:39 AM Atish Patra <atish.patra@wdc.com> wrote: > > The SBI v0.2 introduces a base extension which is backward compatible > with v0.1. Implement all helper functions and minimum required SBI > calls from v0.2 for now. All other base extension function will be > added later as per need. > As v0.2 calling convention is backward compatible with v0.1, remove > the v0.1 helper functions and just use v0.2 calling convention. > > Signed-off-by: Atish Patra <atish.patra@wdc.com> > --- > arch/riscv/include/asm/sbi.h | 139 ++++++++++---------- > arch/riscv/kernel/Makefile | 1 + > arch/riscv/kernel/sbi.c | 241 +++++++++++++++++++++++++++++++++++ > arch/riscv/kernel/setup.c | 2 + > 4 files changed, 311 insertions(+), 72 deletions(-) > create mode 100644 arch/riscv/kernel/sbi.c > > diff --git a/arch/riscv/include/asm/sbi.h b/arch/riscv/include/asm/sbi.h > index 2147f384fad0..279b7f10b3c2 100644 > --- a/arch/riscv/include/asm/sbi.h > +++ b/arch/riscv/include/asm/sbi.h > @@ -8,93 +8,88 @@ > > #include <linux/types.h> > > -#define SBI_EXT_0_1_SET_TIMER 0x0 > -#define SBI_EXT_0_1_CONSOLE_PUTCHAR 0x1 > -#define SBI_EXT_0_1_CONSOLE_GETCHAR 0x2 > -#define SBI_EXT_0_1_CLEAR_IPI 0x3 > -#define SBI_EXT_0_1_SEND_IPI 0x4 > -#define SBI_EXT_0_1_REMOTE_FENCE_I 0x5 > -#define SBI_EXT_0_1_REMOTE_SFENCE_VMA 0x6 > -#define SBI_EXT_0_1_REMOTE_SFENCE_VMA_ASID 0x7 > -#define SBI_EXT_0_1_SHUTDOWN 0x8 > +enum sbi_ext_id { > + SBI_EXT_0_1_SET_TIMER = 0x0, > + SBI_EXT_0_1_CONSOLE_PUTCHAR = 0x1, > + SBI_EXT_0_1_CONSOLE_GETCHAR = 0x2, > + SBI_EXT_0_1_CLEAR_IPI = 0x3, > + SBI_EXT_0_1_SEND_IPI = 0x4, > + SBI_EXT_0_1_REMOTE_FENCE_I = 0x5, > + SBI_EXT_0_1_REMOTE_SFENCE_VMA = 0x6, > + SBI_EXT_0_1_REMOTE_SFENCE_VMA_ASID = 0x7, > + SBI_EXT_0_1_SHUTDOWN = 0x8, > + SBI_EXT_BASE = 0x10, > +}; > > -#define SBI_CALL(which, arg0, arg1, arg2, arg3) ({ \ > - register uintptr_t a0 asm ("a0") = (uintptr_t)(arg0); \ > - register uintptr_t a1 asm ("a1") = (uintptr_t)(arg1); \ > - register uintptr_t a2 asm ("a2") = (uintptr_t)(arg2); \ > - register uintptr_t a3 asm ("a3") = (uintptr_t)(arg3); \ > - register uintptr_t a7 asm ("a7") = (uintptr_t)(which); \ > - asm volatile ("ecall" \ > - : "+r" (a0) \ > - : "r" (a1), "r" (a2), "r" (a3), "r" (a7) \ > - : "memory"); \ > - a0; \ > -}) > +enum sbi_ext_base_fid { > + SBI_BASE_GET_SPEC_VERSION = 0, > + SBI_BASE_GET_IMP_ID, > + SBI_BASE_GET_IMP_VERSION, > + SBI_BASE_PROBE_EXT, > + SBI_BASE_GET_MVENDORID, > + SBI_BASE_GET_MARCHID, > + SBI_BASE_GET_MIMPID, > +}; > > -/* Lazy implementations until SBI is finalized */ > -#define SBI_CALL_0(which) SBI_CALL(which, 0, 0, 0, 0) > -#define SBI_CALL_1(which, arg0) SBI_CALL(which, arg0, 0, 0, 0) > -#define SBI_CALL_2(which, arg0, arg1) SBI_CALL(which, arg0, arg1, 0, 0) > -#define SBI_CALL_3(which, arg0, arg1, arg2) \ > - SBI_CALL(which, arg0, arg1, arg2, 0) > -#define SBI_CALL_4(which, arg0, arg1, arg2, arg3) \ > - SBI_CALL(which, arg0, arg1, arg2, arg3) > +#define SBI_SPEC_VERSION_DEFAULT 0x1 > +#define SBI_SPEC_VERSION_MAJOR_OFFSET 24 > +#define SBI_SPEC_VERSION_MAJOR_MASK 0x7f > +#define SBI_SPEC_VERSION_MINOR_MASK 0xffffff > > -static inline void sbi_console_putchar(int ch) > -{ > - SBI_CALL_1(SBI_EXT_0_1_CONSOLE_PUTCHAR, ch); > -} > +/* SBI return error codes */ > +#define SBI_SUCCESS 0 > +#define SBI_ERR_FAILURE -1 > +#define SBI_ERR_NOT_SUPPORTED -2 > +#define SBI_ERR_INVALID_PARAM -3 > +#define SBI_ERR_DENIED -4 > +#define SBI_ERR_INVALID_ADDRESS -5 > > -static inline int sbi_console_getchar(void) > -{ > - return SBI_CALL_0(SBI_EXT_0_1_CONSOLE_GETCHAR); > -} > - > -static inline void sbi_set_timer(uint64_t stime_value) > -{ > -#if __riscv_xlen == 32 > - SBI_CALL_2(SBI_EXT_0_1_SET_TIMER, stime_value, > - stime_value >> 32); > -#else > - SBI_CALL_1(SBI_EXT_0_1_SET_TIMER, stime_value); > -#endif > -} > +extern unsigned long sbi_spec_version; > +struct sbiret { > + long error; > + long value; > +}; > > -static inline void sbi_shutdown(void) > -{ > - SBI_CALL_0(SBI_EXT_0_1_SHUTDOWN); > -} > +void sbi_init(void); > +struct sbiret sbi_ecall(int ext, int fid, unsigned long arg0, > + unsigned long arg1, unsigned long arg2, > + unsigned long arg3); > +int sbi_err_map_linux_errorno(int err); > > -static inline void sbi_clear_ipi(void) > -{ > - SBI_CALL_0(SBI_EXT_0_1_CLEAR_IPI); > -} > +void sbi_console_putchar(int ch); > +int sbi_console_getchar(void); > +void sbi_set_timer(uint64_t stime_value); > +void sbi_shutdown(void); > +void sbi_clear_ipi(void); > +void sbi_send_ipi(const unsigned long *hart_mask); > +void sbi_remote_fence_i(const unsigned long *hart_mask); > +void sbi_remote_sfence_vma(const unsigned long *hart_mask, > + unsigned long start, > + unsigned long size); > > -static inline void sbi_send_ipi(const unsigned long *hart_mask) > -{ > - SBI_CALL_1(SBI_EXT_0_1_SEND_IPI, hart_mask); > -} > +void sbi_remote_sfence_vma_asid(const unsigned long *hart_mask, > + unsigned long start, > + unsigned long size, > + unsigned long asid); > +int sbi_probe_extension(long ext); > > -static inline void sbi_remote_fence_i(const unsigned long *hart_mask) > +/* Check if current SBI specification version is 0.1 or not */ > +static inline int sbi_spec_is_0_1(void) > { > - SBI_CALL_1(SBI_EXT_0_1_REMOTE_FENCE_I, hart_mask); > + return (sbi_spec_version == SBI_SPEC_VERSION_DEFAULT) ? 1 : 0; > } > > -static inline void sbi_remote_sfence_vma(const unsigned long *hart_mask, > - unsigned long start, > - unsigned long size) > +/* Get the major version of SBI */ > +static inline unsigned long sbi_major_version(void) > { > - SBI_CALL_3(SBI_EXT_0_1_REMOTE_SFENCE_VMA, hart_mask, > - start, size); > + return (sbi_spec_version >> SBI_SPEC_VERSION_MAJOR_OFFSET) & > + SBI_SPEC_VERSION_MAJOR_MASK; > } > > -static inline void sbi_remote_sfence_vma_asid(const unsigned long *hart_mask, > - unsigned long start, > - unsigned long size, > - unsigned long asid) > +/* Get the minor version of SBI */ > +static inline unsigned long sbi_minor_version(void) > { > - SBI_CALL_4(SBI_EXT_0_1_REMOTE_SFENCE_VMA_ASID, hart_mask, > - start, size, asid); > + return sbi_spec_version & SBI_SPEC_VERSION_MINOR_MASK; > } > > #endif > diff --git a/arch/riscv/kernel/Makefile b/arch/riscv/kernel/Makefile > index 2420d37d96de..faf862d26924 100644 > --- a/arch/riscv/kernel/Makefile > +++ b/arch/riscv/kernel/Makefile > @@ -17,6 +17,7 @@ obj-y += irq.o > obj-y += process.o > obj-y += ptrace.o > obj-y += reset.o > +obj-y += sbi.o > obj-y += setup.o > obj-y += signal.o > obj-y += syscall_table.o > diff --git a/arch/riscv/kernel/sbi.c b/arch/riscv/kernel/sbi.c > new file mode 100644 > index 000000000000..315fcb925278 > --- /dev/null > +++ b/arch/riscv/kernel/sbi.c > @@ -0,0 +1,241 @@ > +// SPDX-License-Identifier: GPL-2.0-only > +/* > + * Copyright (c) 2019 Western Digital Corporation or its affiliates. > + */ > + > +#include <asm/sbi.h> > +#include <linux/sched.h> > + > +/* default SBI version is 0.1 */ > +unsigned long sbi_spec_version = SBI_SPEC_VERSION_DEFAULT; > + > +struct sbiret sbi_ecall(int ext, int fid, unsigned long arg0, > + unsigned long arg1, unsigned long arg2, > + unsigned long arg3) > +{ > + struct sbiret ret; > + > + register uintptr_t a0 asm ("a0") = (uintptr_t)(arg0); > + register uintptr_t a1 asm ("a1") = (uintptr_t)(arg1); > + register uintptr_t a2 asm ("a2") = (uintptr_t)(arg2); > + register uintptr_t a3 asm ("a3") = (uintptr_t)(arg3); > + register uintptr_t a6 asm ("a6") = (uintptr_t)(fid); > + register uintptr_t a7 asm ("a7") = (uintptr_t)(ext); > + asm volatile ("ecall" > + : "+r" (a0), "+r" (a1) > + : "r" (a2), "r" (a3), "r" (a6), "r" (a7) > + : "memory"); > + ret.error = a0; > + ret.value = a1; > + > + return ret; > +} > + > +int sbi_err_map_linux_errno(int err) > +{ > + switch (err) { > + case SBI_SUCCESS: > + return 0; > + case SBI_ERR_DENIED: > + return -EPERM; > + case SBI_ERR_INVALID_PARAM: > + return -EINVAL; > + case SBI_ERR_INVALID_ADDRESS: > + return -EFAULT; > + case SBI_ERR_NOT_SUPPORTED: > + case SBI_ERR_FAILURE: > + default: > + return -ENOTSUPP; > + }; > +} > + > +/** > + * sbi_console_putchar() - Writes given character to the console device. > + * @ch: The data to be written to the console. > + * > + * Return: None > + */ > +void sbi_console_putchar(int ch) > +{ > + sbi_ecall(SBI_EXT_0_1_CONSOLE_PUTCHAR, 0, ch, 0, 0, 0); > +} > + > +/** > + * sbi_console_getchar() - Reads a byte from console device. > + * > + * Returns the value read from console. > + */ > +int sbi_console_getchar(void) > +{ > + struct sbiret ret; > + > + ret = sbi_ecall(SBI_EXT_0_1_CONSOLE_GETCHAR, 0, 0, 0, 0, 0); > + > + return ret.error; > +} > + > +/** > + * sbi_set_timer() - Program the timer for next timer event. > + * @stime_value: The value after which next timer event should fire. > + * > + * Return: None > + */ > +void sbi_set_timer(uint64_t stime_value) > +{ > +#if __riscv_xlen == 32 > + sbi_ecall(SBI_EXT_0_1_SET_TIMER, 0, stime_value, > + stime_value >> 32, 0, 0); > +#else > + sbi_ecall(SBI_EXT_0_1_SET_TIMER, 0, stime_value, 0, 0, 0); > +#endif > +} > + > +/** > + * sbi_shutdown() - Remove all the harts from executing supervisor code. > + * > + * Return: None > + */ > +void sbi_shutdown(void) > +{ > + sbi_ecall(SBI_EXT_0_1_SHUTDOWN, 0, 0, 0, 0, 0); > +} > + > +/** > + * sbi_clear_ipi() - Clear any pending IPIs for the calling hart. > + * > + * Return: None > + */ > +void sbi_clear_ipi(void) > +{ > + sbi_ecall(SBI_EXT_0_1_CLEAR_IPI, 0, 0, 0, 0, 0); > +} > + > +/** > + * sbi_send_ipi() - Send an IPI to any hart. > + * @hart_mask: A cpu mask containing all the target harts. > + * > + * Return: None > + */ > +void sbi_send_ipi(const unsigned long *hart_mask) > +{ > + sbi_ecall(SBI_EXT_0_1_SEND_IPI, 0, (unsigned long)hart_mask, > + 0, 0, 0); > +} > + > +/** > + * sbi_remote_fence_i() - Execute FENCE.I instruction on given remote harts. > + * @hart_mask: A cpu mask containing all the target harts. > + * > + * Return: None > + */ > +void sbi_remote_fence_i(const unsigned long *hart_mask) > +{ > + sbi_ecall(SBI_EXT_0_1_REMOTE_FENCE_I, 0, (unsigned long)hart_mask, > + 0, 0, 0); > +} > + > +/** > + * sbi_remote_sfence_vma() - Execute SFENCE.VMA instructions on given remote > + * harts for the specified virtual address range. > + * @hart_mask: A cpu mask containing all the target harts. > + * @start: Start of the virtual address > + * @size: Total size of the virtual address range. > + * > + * Return: None > + */ > +void sbi_remote_sfence_vma(const unsigned long *hart_mask, > + unsigned long start, > + unsigned long size) > +{ > + sbi_ecall(SBI_EXT_0_1_REMOTE_SFENCE_VMA, 0, > + (unsigned long)hart_mask, start, size, 0); > +} > + > +/** > + * sbi_remote_sfence_vma_asid() - Execute SFENCE.VMA instructions on given > + * remote harts for a virtual address range belonging to a specific ASID. > + * > + * @hart_mask: A cpu mask containing all the target harts. > + * @start: Start of the virtual address > + * @size: Total size of the virtual address range. > + * @asid: The value of address space identifier (ASID). > + * > + * Return: None > + */ > +void sbi_remote_sfence_vma_asid(const unsigned long *hart_mask, > + unsigned long start, > + unsigned long size, > + unsigned long asid) > +{ > + sbi_ecall(SBI_EXT_0_1_REMOTE_SFENCE_VMA_ASID, 0, > + (unsigned long)hart_mask, start, size, asid); > +} > + > +/** > + * sbi_probe_extension() - Check if an SBI extension ID is supported or not. > + * @extid: The extension ID to be probed. > + * > + * Return: Extension specific nonzero value if yes, -ENOTSUPP otherwise. > + */ > +int sbi_probe_extension(long extid) > +{ > + struct sbiret ret; > + > + ret = sbi_ecall(SBI_EXT_BASE, SBI_BASE_PROBE_EXT, 0, 0, 0, 0); > + if (!ret.error) > + if (ret.value) > + return ret.value; > + > + return -ENOTSUPP; > +} > + > +static long sbi_get_spec_version(void) > +{ > + struct sbiret ret; > + > + ret = sbi_ecall(SBI_EXT_BASE, SBI_BASE_GET_SPEC_VERSION, > + 0, 0, 0, 0); > + if (!ret.error) > + return ret.value; > + else > + return ret.error; > +} > + > +static long sbi_get_firmware_id(void) > +{ > + struct sbiret ret; > + > + ret = sbi_ecall(SBI_EXT_BASE, SBI_BASE_GET_IMP_ID, > + 0, 0, 0, 0); > + if (!ret.error) > + return ret.value; > + else > + return sbi_err_map_linux_errno(ret.error); > +} > + > +static long sbi_get_firmware_version(void) > +{ > + struct sbiret ret; > + > + ret = sbi_ecall(SBI_EXT_BASE, SBI_BASE_GET_IMP_VERSION, > + 0, 0, 0, 0); > + if (!ret.error) > + return ret.value; > + else > + return sbi_err_map_linux_errno(ret.error); > +} > + > +void sbi_init(void) > +{ > + int ret; > + > + ret = sbi_get_spec_version(); > + if (ret > 0) > + sbi_spec_version = ret; > + > + pr_info("SBI specification v%lu.%lu detected\n", > + sbi_major_version(), sbi_minor_version()); > + if (!sbi_spec_is_0_1()) > + pr_info("SBI implementation ID=0x%lx Version=0x%lx\n", > + sbi_get_firmware_id(), sbi_get_firmware_version()); > +} > diff --git a/arch/riscv/kernel/setup.c b/arch/riscv/kernel/setup.c > index a990a6cb184f..abf2b9ee5307 100644 > --- a/arch/riscv/kernel/setup.c > +++ b/arch/riscv/kernel/setup.c > @@ -21,6 +21,7 @@ > #include <asm/sections.h> > #include <asm/pgtable.h> > #include <asm/smp.h> > +#include <asm/sbi.h> > #include <asm/tlbflush.h> > #include <asm/thread_info.h> > > @@ -70,6 +71,7 @@ void __init setup_arch(char **cmdline_p) > swiotlb_init(1); > #endif > > + sbi_init(); We should do sbi_init() as early as possible. Probably just after parse_early_param() in setup_arch(). > #ifdef CONFIG_SMP > setup_smp(); > #endif > -- > 2.21.0 > Just a small comment above otherwise looks good to me. Reviewed-by: Anup Patel <anup@brainfault.org> Regards, Anup _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv ^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH v2 2/3] RISC-V: Add basic support for SBI v0.2 2019-09-27 0:09 ` [PATCH v2 2/3] RISC-V: Add basic support for SBI v0.2 Atish Patra 2019-09-27 5:47 ` Anup Patel @ 2019-10-03 5:18 ` Anup Patel 1 sibling, 0 replies; 16+ messages in thread From: Anup Patel @ 2019-10-03 5:18 UTC (permalink / raw) To: Atish Patra Cc: Albert Ou, Alan Kao, Greg Kroah-Hartman, Palmer Dabbelt, linux-kernel@vger.kernel.org List, Mike Rapoport, Gary Guo, Paul Walmsley, linux-riscv, Thomas Gleixner, Allison Randal On Fri, Sep 27, 2019 at 5:39 AM Atish Patra <atish.patra@wdc.com> wrote: > > The SBI v0.2 introduces a base extension which is backward compatible > with v0.1. Implement all helper functions and minimum required SBI > calls from v0.2 for now. All other base extension function will be > added later as per need. > As v0.2 calling convention is backward compatible with v0.1, remove > the v0.1 helper functions and just use v0.2 calling convention. > > Signed-off-by: Atish Patra <atish.patra@wdc.com> > --- > arch/riscv/include/asm/sbi.h | 139 ++++++++++---------- > arch/riscv/kernel/Makefile | 1 + > arch/riscv/kernel/sbi.c | 241 +++++++++++++++++++++++++++++++++++ > arch/riscv/kernel/setup.c | 2 + > 4 files changed, 311 insertions(+), 72 deletions(-) > create mode 100644 arch/riscv/kernel/sbi.c > > diff --git a/arch/riscv/include/asm/sbi.h b/arch/riscv/include/asm/sbi.h > index 2147f384fad0..279b7f10b3c2 100644 > --- a/arch/riscv/include/asm/sbi.h > +++ b/arch/riscv/include/asm/sbi.h > @@ -8,93 +8,88 @@ > > #include <linux/types.h> > > -#define SBI_EXT_0_1_SET_TIMER 0x0 > -#define SBI_EXT_0_1_CONSOLE_PUTCHAR 0x1 > -#define SBI_EXT_0_1_CONSOLE_GETCHAR 0x2 > -#define SBI_EXT_0_1_CLEAR_IPI 0x3 > -#define SBI_EXT_0_1_SEND_IPI 0x4 > -#define SBI_EXT_0_1_REMOTE_FENCE_I 0x5 > -#define SBI_EXT_0_1_REMOTE_SFENCE_VMA 0x6 > -#define SBI_EXT_0_1_REMOTE_SFENCE_VMA_ASID 0x7 > -#define SBI_EXT_0_1_SHUTDOWN 0x8 > +enum sbi_ext_id { > + SBI_EXT_0_1_SET_TIMER = 0x0, > + SBI_EXT_0_1_CONSOLE_PUTCHAR = 0x1, > + SBI_EXT_0_1_CONSOLE_GETCHAR = 0x2, > + SBI_EXT_0_1_CLEAR_IPI = 0x3, > + SBI_EXT_0_1_SEND_IPI = 0x4, > + SBI_EXT_0_1_REMOTE_FENCE_I = 0x5, > + SBI_EXT_0_1_REMOTE_SFENCE_VMA = 0x6, > + SBI_EXT_0_1_REMOTE_SFENCE_VMA_ASID = 0x7, > + SBI_EXT_0_1_SHUTDOWN = 0x8, > + SBI_EXT_BASE = 0x10, > +}; > > -#define SBI_CALL(which, arg0, arg1, arg2, arg3) ({ \ > - register uintptr_t a0 asm ("a0") = (uintptr_t)(arg0); \ > - register uintptr_t a1 asm ("a1") = (uintptr_t)(arg1); \ > - register uintptr_t a2 asm ("a2") = (uintptr_t)(arg2); \ > - register uintptr_t a3 asm ("a3") = (uintptr_t)(arg3); \ > - register uintptr_t a7 asm ("a7") = (uintptr_t)(which); \ > - asm volatile ("ecall" \ > - : "+r" (a0) \ > - : "r" (a1), "r" (a2), "r" (a3), "r" (a7) \ > - : "memory"); \ > - a0; \ > -}) > +enum sbi_ext_base_fid { > + SBI_BASE_GET_SPEC_VERSION = 0, > + SBI_BASE_GET_IMP_ID, > + SBI_BASE_GET_IMP_VERSION, > + SBI_BASE_PROBE_EXT, > + SBI_BASE_GET_MVENDORID, > + SBI_BASE_GET_MARCHID, > + SBI_BASE_GET_MIMPID, > +}; > > -/* Lazy implementations until SBI is finalized */ > -#define SBI_CALL_0(which) SBI_CALL(which, 0, 0, 0, 0) > -#define SBI_CALL_1(which, arg0) SBI_CALL(which, arg0, 0, 0, 0) > -#define SBI_CALL_2(which, arg0, arg1) SBI_CALL(which, arg0, arg1, 0, 0) > -#define SBI_CALL_3(which, arg0, arg1, arg2) \ > - SBI_CALL(which, arg0, arg1, arg2, 0) > -#define SBI_CALL_4(which, arg0, arg1, arg2, arg3) \ > - SBI_CALL(which, arg0, arg1, arg2, arg3) > +#define SBI_SPEC_VERSION_DEFAULT 0x1 > +#define SBI_SPEC_VERSION_MAJOR_OFFSET 24 > +#define SBI_SPEC_VERSION_MAJOR_MASK 0x7f > +#define SBI_SPEC_VERSION_MINOR_MASK 0xffffff > > -static inline void sbi_console_putchar(int ch) > -{ > - SBI_CALL_1(SBI_EXT_0_1_CONSOLE_PUTCHAR, ch); > -} > +/* SBI return error codes */ > +#define SBI_SUCCESS 0 > +#define SBI_ERR_FAILURE -1 > +#define SBI_ERR_NOT_SUPPORTED -2 > +#define SBI_ERR_INVALID_PARAM -3 > +#define SBI_ERR_DENIED -4 > +#define SBI_ERR_INVALID_ADDRESS -5 > > -static inline int sbi_console_getchar(void) > -{ > - return SBI_CALL_0(SBI_EXT_0_1_CONSOLE_GETCHAR); > -} > - > -static inline void sbi_set_timer(uint64_t stime_value) > -{ > -#if __riscv_xlen == 32 > - SBI_CALL_2(SBI_EXT_0_1_SET_TIMER, stime_value, > - stime_value >> 32); > -#else > - SBI_CALL_1(SBI_EXT_0_1_SET_TIMER, stime_value); > -#endif > -} > +extern unsigned long sbi_spec_version; > +struct sbiret { > + long error; > + long value; > +}; > > -static inline void sbi_shutdown(void) > -{ > - SBI_CALL_0(SBI_EXT_0_1_SHUTDOWN); > -} > +void sbi_init(void); > +struct sbiret sbi_ecall(int ext, int fid, unsigned long arg0, > + unsigned long arg1, unsigned long arg2, > + unsigned long arg3); > +int sbi_err_map_linux_errorno(int err); > > -static inline void sbi_clear_ipi(void) > -{ > - SBI_CALL_0(SBI_EXT_0_1_CLEAR_IPI); > -} > +void sbi_console_putchar(int ch); > +int sbi_console_getchar(void); > +void sbi_set_timer(uint64_t stime_value); > +void sbi_shutdown(void); > +void sbi_clear_ipi(void); > +void sbi_send_ipi(const unsigned long *hart_mask); > +void sbi_remote_fence_i(const unsigned long *hart_mask); > +void sbi_remote_sfence_vma(const unsigned long *hart_mask, > + unsigned long start, > + unsigned long size); > > -static inline void sbi_send_ipi(const unsigned long *hart_mask) > -{ > - SBI_CALL_1(SBI_EXT_0_1_SEND_IPI, hart_mask); > -} > +void sbi_remote_sfence_vma_asid(const unsigned long *hart_mask, > + unsigned long start, > + unsigned long size, > + unsigned long asid); > +int sbi_probe_extension(long ext); > > -static inline void sbi_remote_fence_i(const unsigned long *hart_mask) > +/* Check if current SBI specification version is 0.1 or not */ > +static inline int sbi_spec_is_0_1(void) > { > - SBI_CALL_1(SBI_EXT_0_1_REMOTE_FENCE_I, hart_mask); > + return (sbi_spec_version == SBI_SPEC_VERSION_DEFAULT) ? 1 : 0; > } > > -static inline void sbi_remote_sfence_vma(const unsigned long *hart_mask, > - unsigned long start, > - unsigned long size) > +/* Get the major version of SBI */ > +static inline unsigned long sbi_major_version(void) > { > - SBI_CALL_3(SBI_EXT_0_1_REMOTE_SFENCE_VMA, hart_mask, > - start, size); > + return (sbi_spec_version >> SBI_SPEC_VERSION_MAJOR_OFFSET) & > + SBI_SPEC_VERSION_MAJOR_MASK; > } > > -static inline void sbi_remote_sfence_vma_asid(const unsigned long *hart_mask, > - unsigned long start, > - unsigned long size, > - unsigned long asid) > +/* Get the minor version of SBI */ > +static inline unsigned long sbi_minor_version(void) > { > - SBI_CALL_4(SBI_EXT_0_1_REMOTE_SFENCE_VMA_ASID, hart_mask, > - start, size, asid); > + return sbi_spec_version & SBI_SPEC_VERSION_MINOR_MASK; > } > > #endif > diff --git a/arch/riscv/kernel/Makefile b/arch/riscv/kernel/Makefile > index 2420d37d96de..faf862d26924 100644 > --- a/arch/riscv/kernel/Makefile > +++ b/arch/riscv/kernel/Makefile > @@ -17,6 +17,7 @@ obj-y += irq.o > obj-y += process.o > obj-y += ptrace.o > obj-y += reset.o > +obj-y += sbi.o > obj-y += setup.o > obj-y += signal.o > obj-y += syscall_table.o > diff --git a/arch/riscv/kernel/sbi.c b/arch/riscv/kernel/sbi.c > new file mode 100644 > index 000000000000..315fcb925278 > --- /dev/null > +++ b/arch/riscv/kernel/sbi.c > @@ -0,0 +1,241 @@ > +// SPDX-License-Identifier: GPL-2.0-only > +/* > + * Copyright (c) 2019 Western Digital Corporation or its affiliates. > + */ > + > +#include <asm/sbi.h> > +#include <linux/sched.h> > + > +/* default SBI version is 0.1 */ > +unsigned long sbi_spec_version = SBI_SPEC_VERSION_DEFAULT; > + > +struct sbiret sbi_ecall(int ext, int fid, unsigned long arg0, > + unsigned long arg1, unsigned long arg2, > + unsigned long arg3) > +{ > + struct sbiret ret; > + > + register uintptr_t a0 asm ("a0") = (uintptr_t)(arg0); > + register uintptr_t a1 asm ("a1") = (uintptr_t)(arg1); > + register uintptr_t a2 asm ("a2") = (uintptr_t)(arg2); > + register uintptr_t a3 asm ("a3") = (uintptr_t)(arg3); > + register uintptr_t a6 asm ("a6") = (uintptr_t)(fid); > + register uintptr_t a7 asm ("a7") = (uintptr_t)(ext); > + asm volatile ("ecall" > + : "+r" (a0), "+r" (a1) > + : "r" (a2), "r" (a3), "r" (a6), "r" (a7) > + : "memory"); > + ret.error = a0; > + ret.value = a1; > + > + return ret; > +} > + > +int sbi_err_map_linux_errno(int err) > +{ > + switch (err) { > + case SBI_SUCCESS: > + return 0; > + case SBI_ERR_DENIED: > + return -EPERM; > + case SBI_ERR_INVALID_PARAM: > + return -EINVAL; > + case SBI_ERR_INVALID_ADDRESS: > + return -EFAULT; > + case SBI_ERR_NOT_SUPPORTED: > + case SBI_ERR_FAILURE: > + default: > + return -ENOTSUPP; > + }; > +} > + > +/** > + * sbi_console_putchar() - Writes given character to the console device. > + * @ch: The data to be written to the console. > + * > + * Return: None > + */ > +void sbi_console_putchar(int ch) > +{ > + sbi_ecall(SBI_EXT_0_1_CONSOLE_PUTCHAR, 0, ch, 0, 0, 0); > +} > + > +/** > + * sbi_console_getchar() - Reads a byte from console device. > + * > + * Returns the value read from console. > + */ > +int sbi_console_getchar(void) > +{ > + struct sbiret ret; > + > + ret = sbi_ecall(SBI_EXT_0_1_CONSOLE_GETCHAR, 0, 0, 0, 0, 0); > + > + return ret.error; > +} > + > +/** > + * sbi_set_timer() - Program the timer for next timer event. > + * @stime_value: The value after which next timer event should fire. > + * > + * Return: None > + */ > +void sbi_set_timer(uint64_t stime_value) > +{ > +#if __riscv_xlen == 32 > + sbi_ecall(SBI_EXT_0_1_SET_TIMER, 0, stime_value, > + stime_value >> 32, 0, 0); > +#else > + sbi_ecall(SBI_EXT_0_1_SET_TIMER, 0, stime_value, 0, 0, 0); > +#endif > +} > + > +/** > + * sbi_shutdown() - Remove all the harts from executing supervisor code. > + * > + * Return: None > + */ > +void sbi_shutdown(void) > +{ > + sbi_ecall(SBI_EXT_0_1_SHUTDOWN, 0, 0, 0, 0, 0); > +} > + > +/** > + * sbi_clear_ipi() - Clear any pending IPIs for the calling hart. > + * > + * Return: None > + */ > +void sbi_clear_ipi(void) > +{ > + sbi_ecall(SBI_EXT_0_1_CLEAR_IPI, 0, 0, 0, 0, 0); > +} > + > +/** > + * sbi_send_ipi() - Send an IPI to any hart. > + * @hart_mask: A cpu mask containing all the target harts. > + * > + * Return: None > + */ > +void sbi_send_ipi(const unsigned long *hart_mask) > +{ > + sbi_ecall(SBI_EXT_0_1_SEND_IPI, 0, (unsigned long)hart_mask, > + 0, 0, 0); > +} > + > +/** > + * sbi_remote_fence_i() - Execute FENCE.I instruction on given remote harts. > + * @hart_mask: A cpu mask containing all the target harts. > + * > + * Return: None > + */ > +void sbi_remote_fence_i(const unsigned long *hart_mask) > +{ > + sbi_ecall(SBI_EXT_0_1_REMOTE_FENCE_I, 0, (unsigned long)hart_mask, > + 0, 0, 0); > +} > + > +/** > + * sbi_remote_sfence_vma() - Execute SFENCE.VMA instructions on given remote > + * harts for the specified virtual address range. > + * @hart_mask: A cpu mask containing all the target harts. > + * @start: Start of the virtual address > + * @size: Total size of the virtual address range. > + * > + * Return: None > + */ > +void sbi_remote_sfence_vma(const unsigned long *hart_mask, > + unsigned long start, > + unsigned long size) > +{ > + sbi_ecall(SBI_EXT_0_1_REMOTE_SFENCE_VMA, 0, > + (unsigned long)hart_mask, start, size, 0); > +} > + > +/** > + * sbi_remote_sfence_vma_asid() - Execute SFENCE.VMA instructions on given > + * remote harts for a virtual address range belonging to a specific ASID. > + * > + * @hart_mask: A cpu mask containing all the target harts. > + * @start: Start of the virtual address > + * @size: Total size of the virtual address range. > + * @asid: The value of address space identifier (ASID). > + * > + * Return: None > + */ > +void sbi_remote_sfence_vma_asid(const unsigned long *hart_mask, > + unsigned long start, > + unsigned long size, > + unsigned long asid) > +{ > + sbi_ecall(SBI_EXT_0_1_REMOTE_SFENCE_VMA_ASID, 0, > + (unsigned long)hart_mask, start, size, asid); > +} > + > +/** > + * sbi_probe_extension() - Check if an SBI extension ID is supported or not. > + * @extid: The extension ID to be probed. > + * > + * Return: Extension specific nonzero value if yes, -ENOTSUPP otherwise. > + */ > +int sbi_probe_extension(long extid) > +{ > + struct sbiret ret; > + > + ret = sbi_ecall(SBI_EXT_BASE, SBI_BASE_PROBE_EXT, 0, 0, 0, 0); > + if (!ret.error) > + if (ret.value) > + return ret.value; > + > + return -ENOTSUPP; > +} Please EXPORT() all public APIs of SBI. The KVM RISC-V does not compile as module if these public APIs are not exported. Regards, Anup > + > +static long sbi_get_spec_version(void) > +{ > + struct sbiret ret; > + > + ret = sbi_ecall(SBI_EXT_BASE, SBI_BASE_GET_SPEC_VERSION, > + 0, 0, 0, 0); > + if (!ret.error) > + return ret.value; > + else > + return ret.error; > +} > + > +static long sbi_get_firmware_id(void) > +{ > + struct sbiret ret; > + > + ret = sbi_ecall(SBI_EXT_BASE, SBI_BASE_GET_IMP_ID, > + 0, 0, 0, 0); > + if (!ret.error) > + return ret.value; > + else > + return sbi_err_map_linux_errno(ret.error); > +} > + > +static long sbi_get_firmware_version(void) > +{ > + struct sbiret ret; > + > + ret = sbi_ecall(SBI_EXT_BASE, SBI_BASE_GET_IMP_VERSION, > + 0, 0, 0, 0); > + if (!ret.error) > + return ret.value; > + else > + return sbi_err_map_linux_errno(ret.error); > +} > + > +void sbi_init(void) > +{ > + int ret; > + > + ret = sbi_get_spec_version(); > + if (ret > 0) > + sbi_spec_version = ret; > + > + pr_info("SBI specification v%lu.%lu detected\n", > + sbi_major_version(), sbi_minor_version()); > + if (!sbi_spec_is_0_1()) > + pr_info("SBI implementation ID=0x%lx Version=0x%lx\n", > + sbi_get_firmware_id(), sbi_get_firmware_version()); > +} > diff --git a/arch/riscv/kernel/setup.c b/arch/riscv/kernel/setup.c > index a990a6cb184f..abf2b9ee5307 100644 > --- a/arch/riscv/kernel/setup.c > +++ b/arch/riscv/kernel/setup.c > @@ -21,6 +21,7 @@ > #include <asm/sections.h> > #include <asm/pgtable.h> > #include <asm/smp.h> > +#include <asm/sbi.h> > #include <asm/tlbflush.h> > #include <asm/thread_info.h> > > @@ -70,6 +71,7 @@ void __init setup_arch(char **cmdline_p) > swiotlb_init(1); > #endif > > + sbi_init(); > #ifdef CONFIG_SMP > setup_smp(); > #endif > -- > 2.21.0 > _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv ^ permalink raw reply [flat|nested] 16+ messages in thread
* [PATCH v2 3/3] RISC-V: Move SBI related macros under uapi. 2019-09-27 0:09 [PATCH v2 0/3] Add support for SBI v0.2 Atish Patra 2019-09-27 0:09 ` [PATCH v2 1/3] RISC-V: Mark existing SBI as 0.1 SBI Atish Patra 2019-09-27 0:09 ` [PATCH v2 2/3] RISC-V: Add basic support for SBI v0.2 Atish Patra @ 2019-09-27 0:09 ` Atish Patra 2019-09-27 5:48 ` Anup Patel 2019-09-27 22:21 ` Christoph Hellwig 2019-09-27 22:19 ` [PATCH v2 0/3] Add support for SBI v0.2 Christoph Hellwig 3 siblings, 2 replies; 16+ messages in thread From: Atish Patra @ 2019-09-27 0:09 UTC (permalink / raw) To: linux-kernel Cc: Albert Ou, Alan Kao, Anup Patel, Palmer Dabbelt, Mike Rapoport, Paul Walmsley, Atish Patra, Gary Guo, Greg Kroah-Hartman, linux-riscv, Thomas Gleixner, Allison Randal All SBI related macros can be reused by KVM RISC-V and userspace tools such as kvmtool, qemu-kvm. SBI calls can also be emulated by userspace if required. Any future vendor extensions can leverage this to emulate the specific extension in userspace instead of kernel. Signed-off-by: Atish Patra <atish.patra@wdc.com> --- arch/riscv/include/asm/sbi.h | 37 +----------------------- arch/riscv/include/uapi/asm/sbi.h | 48 +++++++++++++++++++++++++++++++ 2 files changed, 49 insertions(+), 36 deletions(-) create mode 100644 arch/riscv/include/uapi/asm/sbi.h diff --git a/arch/riscv/include/asm/sbi.h b/arch/riscv/include/asm/sbi.h index 279b7f10b3c2..902b83041111 100644 --- a/arch/riscv/include/asm/sbi.h +++ b/arch/riscv/include/asm/sbi.h @@ -7,42 +7,7 @@ #define _ASM_RISCV_SBI_H #include <linux/types.h> - -enum sbi_ext_id { - SBI_EXT_0_1_SET_TIMER = 0x0, - SBI_EXT_0_1_CONSOLE_PUTCHAR = 0x1, - SBI_EXT_0_1_CONSOLE_GETCHAR = 0x2, - SBI_EXT_0_1_CLEAR_IPI = 0x3, - SBI_EXT_0_1_SEND_IPI = 0x4, - SBI_EXT_0_1_REMOTE_FENCE_I = 0x5, - SBI_EXT_0_1_REMOTE_SFENCE_VMA = 0x6, - SBI_EXT_0_1_REMOTE_SFENCE_VMA_ASID = 0x7, - SBI_EXT_0_1_SHUTDOWN = 0x8, - SBI_EXT_BASE = 0x10, -}; - -enum sbi_ext_base_fid { - SBI_BASE_GET_SPEC_VERSION = 0, - SBI_BASE_GET_IMP_ID, - SBI_BASE_GET_IMP_VERSION, - SBI_BASE_PROBE_EXT, - SBI_BASE_GET_MVENDORID, - SBI_BASE_GET_MARCHID, - SBI_BASE_GET_MIMPID, -}; - -#define SBI_SPEC_VERSION_DEFAULT 0x1 -#define SBI_SPEC_VERSION_MAJOR_OFFSET 24 -#define SBI_SPEC_VERSION_MAJOR_MASK 0x7f -#define SBI_SPEC_VERSION_MINOR_MASK 0xffffff - -/* SBI return error codes */ -#define SBI_SUCCESS 0 -#define SBI_ERR_FAILURE -1 -#define SBI_ERR_NOT_SUPPORTED -2 -#define SBI_ERR_INVALID_PARAM -3 -#define SBI_ERR_DENIED -4 -#define SBI_ERR_INVALID_ADDRESS -5 +#include <uapi/asm/sbi.h> extern unsigned long sbi_spec_version; struct sbiret { diff --git a/arch/riscv/include/uapi/asm/sbi.h b/arch/riscv/include/uapi/asm/sbi.h new file mode 100644 index 000000000000..2e09ee52c346 --- /dev/null +++ b/arch/riscv/include/uapi/asm/sbi.h @@ -0,0 +1,48 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Common SBI related defines and macros to be used by RISC-V kernel, + * RISC-V KVM and userspace. + * + * Copyright (c) 2019 Western Digital Corporation or its affiliates. + */ + +#ifndef _UAPI_ASM_RISCV_SBI_H +#define _UAPI_ASM_RISCV_SBI_H + +enum sbi_ext_id { + SBI_EXT_0_1_SET_TIMER = 0x0, + SBI_EXT_0_1_CONSOLE_PUTCHAR = 0x1, + SBI_EXT_0_1_CONSOLE_GETCHAR = 0x2, + SBI_EXT_0_1_CLEAR_IPI = 0x3, + SBI_EXT_0_1_SEND_IPI = 0x4, + SBI_EXT_0_1_REMOTE_FENCE_I = 0x5, + SBI_EXT_0_1_REMOTE_SFENCE_VMA = 0x6, + SBI_EXT_0_1_REMOTE_SFENCE_VMA_ASID = 0x7, + SBI_EXT_0_1_SHUTDOWN = 0x8, + SBI_EXT_BASE = 0x10, +}; + +enum sbi_ext_base_fid { + SBI_BASE_GET_SPEC_VERSION = 0, + SBI_BASE_GET_IMP_ID, + SBI_BASE_GET_IMP_VERSION, + SBI_BASE_PROBE_EXT, + SBI_BASE_GET_MVENDORID, + SBI_BASE_GET_MARCHID, + SBI_BASE_GET_MIMPID, +}; + +#define SBI_SPEC_VERSION_DEFAULT 0x1 +#define SBI_SPEC_VERSION_MAJOR_OFFSET 24 +#define SBI_SPEC_VERSION_MAJOR_MASK 0x7f +#define SBI_SPEC_VERSION_MINOR_MASK 0xffffff + +/* SBI return error codes */ +#define SBI_SUCCESS 0 +#define SBI_ERR_FAILURE -1 +#define SBI_ERR_NOT_SUPPORTED -2 +#define SBI_ERR_INVALID_PARAM -3 +#define SBI_ERR_DENIED -4 +#define SBI_ERR_INVALID_ADDRESS -5 + +#endif -- 2.21.0 _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv ^ permalink raw reply related [flat|nested] 16+ messages in thread
* Re: [PATCH v2 3/3] RISC-V: Move SBI related macros under uapi. 2019-09-27 0:09 ` [PATCH v2 3/3] RISC-V: Move SBI related macros under uapi Atish Patra @ 2019-09-27 5:48 ` Anup Patel 2019-09-27 22:21 ` Christoph Hellwig 1 sibling, 0 replies; 16+ messages in thread From: Anup Patel @ 2019-09-27 5:48 UTC (permalink / raw) To: Atish Patra Cc: Albert Ou, Alan Kao, Greg Kroah-Hartman, Palmer Dabbelt, linux-kernel@vger.kernel.org List, Mike Rapoport, Gary Guo, Paul Walmsley, linux-riscv, Thomas Gleixner, Allison Randal On Fri, Sep 27, 2019 at 5:39 AM Atish Patra <atish.patra@wdc.com> wrote: > > All SBI related macros can be reused by KVM RISC-V and userspace tools > such as kvmtool, qemu-kvm. SBI calls can also be emulated by userspace > if required. Any future vendor extensions can leverage this to emulate > the specific extension in userspace instead of kernel. > > Signed-off-by: Atish Patra <atish.patra@wdc.com> > --- > arch/riscv/include/asm/sbi.h | 37 +----------------------- > arch/riscv/include/uapi/asm/sbi.h | 48 +++++++++++++++++++++++++++++++ > 2 files changed, 49 insertions(+), 36 deletions(-) > create mode 100644 arch/riscv/include/uapi/asm/sbi.h > > diff --git a/arch/riscv/include/asm/sbi.h b/arch/riscv/include/asm/sbi.h > index 279b7f10b3c2..902b83041111 100644 > --- a/arch/riscv/include/asm/sbi.h > +++ b/arch/riscv/include/asm/sbi.h > @@ -7,42 +7,7 @@ > #define _ASM_RISCV_SBI_H > > #include <linux/types.h> > - > -enum sbi_ext_id { > - SBI_EXT_0_1_SET_TIMER = 0x0, > - SBI_EXT_0_1_CONSOLE_PUTCHAR = 0x1, > - SBI_EXT_0_1_CONSOLE_GETCHAR = 0x2, > - SBI_EXT_0_1_CLEAR_IPI = 0x3, > - SBI_EXT_0_1_SEND_IPI = 0x4, > - SBI_EXT_0_1_REMOTE_FENCE_I = 0x5, > - SBI_EXT_0_1_REMOTE_SFENCE_VMA = 0x6, > - SBI_EXT_0_1_REMOTE_SFENCE_VMA_ASID = 0x7, > - SBI_EXT_0_1_SHUTDOWN = 0x8, > - SBI_EXT_BASE = 0x10, > -}; > - > -enum sbi_ext_base_fid { > - SBI_BASE_GET_SPEC_VERSION = 0, > - SBI_BASE_GET_IMP_ID, > - SBI_BASE_GET_IMP_VERSION, > - SBI_BASE_PROBE_EXT, > - SBI_BASE_GET_MVENDORID, > - SBI_BASE_GET_MARCHID, > - SBI_BASE_GET_MIMPID, > -}; > - > -#define SBI_SPEC_VERSION_DEFAULT 0x1 > -#define SBI_SPEC_VERSION_MAJOR_OFFSET 24 > -#define SBI_SPEC_VERSION_MAJOR_MASK 0x7f > -#define SBI_SPEC_VERSION_MINOR_MASK 0xffffff > - > -/* SBI return error codes */ > -#define SBI_SUCCESS 0 > -#define SBI_ERR_FAILURE -1 > -#define SBI_ERR_NOT_SUPPORTED -2 > -#define SBI_ERR_INVALID_PARAM -3 > -#define SBI_ERR_DENIED -4 > -#define SBI_ERR_INVALID_ADDRESS -5 > +#include <uapi/asm/sbi.h> > > extern unsigned long sbi_spec_version; > struct sbiret { > diff --git a/arch/riscv/include/uapi/asm/sbi.h b/arch/riscv/include/uapi/asm/sbi.h > new file mode 100644 > index 000000000000..2e09ee52c346 > --- /dev/null > +++ b/arch/riscv/include/uapi/asm/sbi.h > @@ -0,0 +1,48 @@ > +/* SPDX-License-Identifier: GPL-2.0-only */ > +/* > + * Common SBI related defines and macros to be used by RISC-V kernel, > + * RISC-V KVM and userspace. > + * > + * Copyright (c) 2019 Western Digital Corporation or its affiliates. > + */ > + > +#ifndef _UAPI_ASM_RISCV_SBI_H > +#define _UAPI_ASM_RISCV_SBI_H > + > +enum sbi_ext_id { > + SBI_EXT_0_1_SET_TIMER = 0x0, > + SBI_EXT_0_1_CONSOLE_PUTCHAR = 0x1, > + SBI_EXT_0_1_CONSOLE_GETCHAR = 0x2, > + SBI_EXT_0_1_CLEAR_IPI = 0x3, > + SBI_EXT_0_1_SEND_IPI = 0x4, > + SBI_EXT_0_1_REMOTE_FENCE_I = 0x5, > + SBI_EXT_0_1_REMOTE_SFENCE_VMA = 0x6, > + SBI_EXT_0_1_REMOTE_SFENCE_VMA_ASID = 0x7, > + SBI_EXT_0_1_SHUTDOWN = 0x8, > + SBI_EXT_BASE = 0x10, > +}; > + > +enum sbi_ext_base_fid { > + SBI_BASE_GET_SPEC_VERSION = 0, > + SBI_BASE_GET_IMP_ID, > + SBI_BASE_GET_IMP_VERSION, > + SBI_BASE_PROBE_EXT, > + SBI_BASE_GET_MVENDORID, > + SBI_BASE_GET_MARCHID, > + SBI_BASE_GET_MIMPID, > +}; > + > +#define SBI_SPEC_VERSION_DEFAULT 0x1 > +#define SBI_SPEC_VERSION_MAJOR_OFFSET 24 > +#define SBI_SPEC_VERSION_MAJOR_MASK 0x7f > +#define SBI_SPEC_VERSION_MINOR_MASK 0xffffff > + > +/* SBI return error codes */ > +#define SBI_SUCCESS 0 > +#define SBI_ERR_FAILURE -1 > +#define SBI_ERR_NOT_SUPPORTED -2 > +#define SBI_ERR_INVALID_PARAM -3 > +#define SBI_ERR_DENIED -4 > +#define SBI_ERR_INVALID_ADDRESS -5 > + > +#endif > -- > 2.21.0 > Thanks for considering KVM user-space SBI emulation. Reviewed-by: Anup Patel <anup@brainfault.org> Regards, Anup _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv ^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH v2 3/3] RISC-V: Move SBI related macros under uapi. 2019-09-27 0:09 ` [PATCH v2 3/3] RISC-V: Move SBI related macros under uapi Atish Patra 2019-09-27 5:48 ` Anup Patel @ 2019-09-27 22:21 ` Christoph Hellwig 2019-10-03 5:30 ` Anup Patel 1 sibling, 1 reply; 16+ messages in thread From: Christoph Hellwig @ 2019-09-27 22:21 UTC (permalink / raw) To: Atish Patra Cc: Albert Ou, Alan Kao, Greg Kroah-Hartman, Anup Patel, Palmer Dabbelt, linux-kernel, Mike Rapoport, Gary Guo, Paul Walmsley, linux-riscv, Thomas Gleixner, Allison Randal On Thu, Sep 26, 2019 at 05:09:15PM -0700, Atish Patra wrote: > All SBI related macros can be reused by KVM RISC-V and userspace tools > such as kvmtool, qemu-kvm. SBI calls can also be emulated by userspace > if required. Any future vendor extensions can leverage this to emulate > the specific extension in userspace instead of kernel. Just because userspace can use them that doesn't mean they are a userspace API. Please don't do this as this limits how we can ever remove previously existing symbols. Just copy over the current version of the file into the other project of your choice instead of creating and API we need to maintain. _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv ^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH v2 3/3] RISC-V: Move SBI related macros under uapi. 2019-09-27 22:21 ` Christoph Hellwig @ 2019-10-03 5:30 ` Anup Patel 2019-10-08 15:39 ` Christoph Hellwig 0 siblings, 1 reply; 16+ messages in thread From: Anup Patel @ 2019-10-03 5:30 UTC (permalink / raw) To: Christoph Hellwig Cc: Albert Ou, Alan Kao, Greg Kroah-Hartman, Palmer Dabbelt, linux-kernel@vger.kernel.org List, Mike Rapoport, Atish Patra, Gary Guo, Paul Walmsley, linux-riscv, Thomas Gleixner, Allison Randal On Sat, Sep 28, 2019 at 3:51 AM Christoph Hellwig <hch@infradead.org> wrote: > > On Thu, Sep 26, 2019 at 05:09:15PM -0700, Atish Patra wrote: > > All SBI related macros can be reused by KVM RISC-V and userspace tools > > such as kvmtool, qemu-kvm. SBI calls can also be emulated by userspace > > if required. Any future vendor extensions can leverage this to emulate > > the specific extension in userspace instead of kernel. > > Just because userspace can use them that doesn't mean they are a > userspace API. Please don't do this as this limits how we can ever > remove previously existing symbols. Just copy over the current > version of the file into the other project of your choice instead > of creating and API we need to maintain. These defines are indeed part of KVM userspace API because we will be forwarding SBI calls not handled by KVM RISC-V kernel module to KVM userspace (QEMU/KVMTOOL). The forwarded SBI call details are passed to userspace via "struct kvm_run" of KVM_RUN ioctl. Please refer PATCH17 and PATCH18 of KVM RISC-V v8 series. Currently, we implement SBI v0.1 for KVM Guest hence we end-up forwarding CONSOLE_GETCHAR and CONSOLE_PUTCHART to KVM userspace. In future we will implement SBI v0.2 for KVM Guest where we will be forwarding the SBI v0.2 experimental and vendor extension calls to KVM userspace. Eventually, we will stop emulating SBI v0.1 for Guest once we have all required calls in SBI v0.2. At that time, all SBI v0.1 calls will be always forwarded to KVM userspace. Regards, Anup _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv ^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH v2 3/3] RISC-V: Move SBI related macros under uapi. 2019-10-03 5:30 ` Anup Patel @ 2019-10-08 15:39 ` Christoph Hellwig 0 siblings, 0 replies; 16+ messages in thread From: Christoph Hellwig @ 2019-10-08 15:39 UTC (permalink / raw) To: Anup Patel Cc: Albert Ou, Alan Kao, Greg Kroah-Hartman, Palmer Dabbelt, linux-kernel@vger.kernel.org List, Mike Rapoport, Christoph Hellwig, Atish Patra, Gary Guo, Paul Walmsley, linux-riscv, Thomas Gleixner, Allison Randal On Thu, Oct 03, 2019 at 11:00:05AM +0530, Anup Patel wrote: > These defines are indeed part of KVM userspace API because we will > be forwarding SBI calls not handled by KVM RISC-V kernel module to > KVM userspace (QEMU/KVMTOOL). The forwarded SBI call details > are passed to userspace via "struct kvm_run" of KVM_RUN ioctl. At best your are passing through a hardware interface. We don't expose e.g. the nvme headers to userspace either. We keep the headers clean enough that userspace can copy them (and a few projects do), but they really are not a kernel interface in any classic way. _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv ^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH v2 0/3] Add support for SBI v0.2 2019-09-27 0:09 [PATCH v2 0/3] Add support for SBI v0.2 Atish Patra ` (2 preceding siblings ...) 2019-09-27 0:09 ` [PATCH v2 3/3] RISC-V: Move SBI related macros under uapi Atish Patra @ 2019-09-27 22:19 ` Christoph Hellwig 2019-09-27 22:57 ` Atish Patra 3 siblings, 1 reply; 16+ messages in thread From: Christoph Hellwig @ 2019-09-27 22:19 UTC (permalink / raw) To: Atish Patra Cc: Albert Ou, Alan Kao, Greg Kroah-Hartman, Anup Patel, Palmer Dabbelt, linux-kernel, Mike Rapoport, Gary Guo, Paul Walmsley, linux-riscv, Thomas Gleixner, Allison Randal On Thu, Sep 26, 2019 at 05:09:12PM -0700, Atish Patra wrote: > The Supervisor Binary Interface(SBI) specification[1] now defines a > base extension that provides extendability to add future extensions > while maintaining backward compatibility with previous versions. > The new version is defined as 0.2 and older version is marked as 0.1. > > This series adds support v0.2 and a unified calling convention > implementation between 0.1 and 0.2. It also adds minimal SBI functions > from 0.2 as well to keep the series lean. So before we do this game can be please make sure we have a clean 0.2 environment that never uses the legacy extensions as discussed before? Without that all this work is rather futile. _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv ^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH v2 0/3] Add support for SBI v0.2 2019-09-27 22:19 ` [PATCH v2 0/3] Add support for SBI v0.2 Christoph Hellwig @ 2019-09-27 22:57 ` Atish Patra 2019-10-01 4:58 ` Alan Kao 0 siblings, 1 reply; 16+ messages in thread From: Atish Patra @ 2019-09-27 22:57 UTC (permalink / raw) To: hch Cc: aou, alankao, gregkh, anup, palmer, linux-kernel, rppt, gary, paul.walmsley, linux-riscv, tglx, allison On Fri, 2019-09-27 at 15:19 -0700, Christoph Hellwig wrote: > On Thu, Sep 26, 2019 at 05:09:12PM -0700, Atish Patra wrote: > > The Supervisor Binary Interface(SBI) specification[1] now defines a > > base extension that provides extendability to add future extensions > > while maintaining backward compatibility with previous versions. > > The new version is defined as 0.2 and older version is marked as > > 0.1. > > > > This series adds support v0.2 and a unified calling convention > > implementation between 0.1 and 0.2. It also adds minimal SBI > > functions > > from 0.2 as well to keep the series lean. > > So before we do this game can be please make sure we have a clean 0.2 > environment that never uses the legacy extensions as discussed > before? > Without that all this work is rather futile. > As per our discussion offline, here are things need to be done to achieve that. 1. Replace timer, sfence and ipi with better alternative APIs - sbi_set_timer will be same but with new calling convention - send_ipi and sfence_* apis can be modified in such a way that - we don't have to use unprivileged load anymore - Make it scalable 2. Drop clear_ipi, console, and shutdown in 0.2. We will have a new kernel config (LEGACY_SBI) that can be manually enabled if older firmware need to be used. By default, LEGACY_SBI will be disabled and kernel with new SBI will be built. We will have to set a flag day in a year or so when we can remove the LEGACY_SBI completely. Let us know if it is not an acceptable approach to anybody. I will post a RFC patch with new alternate v0.2 APIs sometime next week. > _______________________________________________ > linux-riscv mailing list > linux-riscv@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-riscv -- Regards, Atish _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv ^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH v2 0/3] Add support for SBI v0.2 2019-09-27 22:57 ` Atish Patra @ 2019-10-01 4:58 ` Alan Kao 2019-10-01 7:31 ` Atish Patra 0 siblings, 1 reply; 16+ messages in thread From: Alan Kao @ 2019-10-01 4:58 UTC (permalink / raw) To: Atish Patra Cc: aou, gregkh, anup, palmer, linux-kernel, rppt, hch, gary, paul.walmsley, linux-riscv, tglx, allison On Fri, Sep 27, 2019 at 10:57:45PM +0000, Atish Patra wrote: > On Fri, 2019-09-27 at 15:19 -0700, Christoph Hellwig wrote: > > On Thu, Sep 26, 2019 at 05:09:12PM -0700, Atish Patra wrote: > > > The Supervisor Binary Interface(SBI) specification[1] now defines a > > > base extension that provides extendability to add future extensions > > > while maintaining backward compatibility with previous versions. > > > The new version is defined as 0.2 and older version is marked as > > > 0.1. > > > > > > This series adds support v0.2 and a unified calling convention > > > implementation between 0.1 and 0.2. It also adds minimal SBI > > > functions > > > from 0.2 as well to keep the series lean. > > > > So before we do this game can be please make sure we have a clean 0.2 > > environment that never uses the legacy extensions as discussed > > before? > > Without that all this work is rather futile. > > > > As per our discussion offline, here are things need to be done to > achieve that. > > 1. Replace timer, sfence and ipi with better alternative APIs > - sbi_set_timer will be same but with new calling convention > - send_ipi and sfence_* apis can be modified in such a way that > - we don't have to use unprivileged load anymore > - Make it scalable > > 2. Drop clear_ipi, console, and shutdown in 0.2. > > We will have a new kernel config (LEGACY_SBI) that can be manually > enabled if older firmware need to be used. By default, LEGACY_SBI will > be disabled and kernel with new SBI will be built. We will have to set > a flag day in a year or so when we can remove the LEGACY_SBI > completely. > > Let us know if it is not an acceptable approach to anybody. > I will post a RFC patch with new alternate v0.2 APIs sometime next > week. > Will this legacy option be compatible will bbl? says, version 1.0.0 or any earlier ones? > > _______________________________________________ > > linux-riscv mailing list > > linux-riscv@lists.infradead.org > > http://lists.infradead.org/mailman/listinfo/linux-riscv > > -- > Regards, > Atish _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv ^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH v2 0/3] Add support for SBI v0.2 2019-10-01 4:58 ` Alan Kao @ 2019-10-01 7:31 ` Atish Patra 0 siblings, 0 replies; 16+ messages in thread From: Atish Patra @ 2019-10-01 7:31 UTC (permalink / raw) To: alankao Cc: aou, gregkh, anup, palmer, linux-kernel, rppt, hch, gary, paul.walmsley, linux-riscv, tglx, allison On Tue, 2019-10-01 at 12:58 +0800, Alan Kao wrote: > On Fri, Sep 27, 2019 at 10:57:45PM +0000, Atish Patra wrote: > > On Fri, 2019-09-27 at 15:19 -0700, Christoph Hellwig wrote: > > > On Thu, Sep 26, 2019 at 05:09:12PM -0700, Atish Patra wrote: > > > > The Supervisor Binary Interface(SBI) specification[1] now > > > > defines a > > > > base extension that provides extendability to add future > > > > extensions > > > > while maintaining backward compatibility with previous > > > > versions. > > > > The new version is defined as 0.2 and older version is marked > > > > as > > > > 0.1. > > > > > > > > This series adds support v0.2 and a unified calling convention > > > > implementation between 0.1 and 0.2. It also adds minimal SBI > > > > functions > > > > from 0.2 as well to keep the series lean. > > > > > > So before we do this game can be please make sure we have a clean > > > 0.2 > > > environment that never uses the legacy extensions as discussed > > > before? > > > Without that all this work is rather futile. > > > > > > > As per our discussion offline, here are things need to be done to > > achieve that. > > > > 1. Replace timer, sfence and ipi with better alternative APIs > > - sbi_set_timer will be same but with new calling convention > > - send_ipi and sfence_* apis can be modified in such a way that > > - we don't have to use unprivileged load anymore > > - Make it scalable > > > > 2. Drop clear_ipi, console, and shutdown in 0.2. > > > > We will have a new kernel config (LEGACY_SBI) that can be manually > > enabled if older firmware need to be used. By default, LEGACY_SBI > > will > > be disabled and kernel with new SBI will be built. We will have to > > set > > a flag day in a year or so when we can remove the LEGACY_SBI > > completely. > > > > Let us know if it is not an acceptable approach to anybody. > > I will post a RFC patch with new alternate v0.2 APIs sometime next > > week. > > > > Will this legacy option be compatible will bbl? says, version 1.0.0 > or > any earlier ones? > Yes. The config option will just need to be enabled in kernel to make it compatible with bbl or older opensbi versions. Eventually, we will get rid of the legacy ones sometime in future when everybody has migrated to updated compatible version (at least a year or so). > > > _______________________________________________ > > > linux-riscv mailing list > > > linux-riscv@lists.infradead.org > > > http://lists.infradead.org/mailman/listinfo/linux-riscv > > > > -- > > Regards, > > Atish -- Regards, Atish _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv ^ permalink raw reply [flat|nested] 16+ messages in thread
end of thread, other threads:[~2019-10-08 15:39 UTC | newest] Thread overview: 16+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2019-09-27 0:09 [PATCH v2 0/3] Add support for SBI v0.2 Atish Patra 2019-09-27 0:09 ` [PATCH v2 1/3] RISC-V: Mark existing SBI as 0.1 SBI Atish Patra 2019-09-27 5:47 ` Anup Patel 2019-09-27 22:19 ` Christoph Hellwig 2019-09-27 0:09 ` [PATCH v2 2/3] RISC-V: Add basic support for SBI v0.2 Atish Patra 2019-09-27 5:47 ` Anup Patel 2019-10-03 5:18 ` Anup Patel 2019-09-27 0:09 ` [PATCH v2 3/3] RISC-V: Move SBI related macros under uapi Atish Patra 2019-09-27 5:48 ` Anup Patel 2019-09-27 22:21 ` Christoph Hellwig 2019-10-03 5:30 ` Anup Patel 2019-10-08 15:39 ` Christoph Hellwig 2019-09-27 22:19 ` [PATCH v2 0/3] Add support for SBI v0.2 Christoph Hellwig 2019-09-27 22:57 ` Atish Patra 2019-10-01 4:58 ` Alan Kao 2019-10-01 7:31 ` Atish Patra
This is a public inbox, see mirroring instructions for how to clone and mirror all data and code used for this inbox; as well as URLs for NNTP newsgroup(s).