From: Christoph Hellwig <hch@lst.de>
To: Mauro Carvalho Chehab <mchehab+samsung@kernel.org>
Cc: palmer@sifive.com, linux-kernel@vger.kernel.org,
Yash Shah <yash.shah@sifive.com>, Borislav Petkov <bp@alien8.de>,
paul.walmsley@sifive.com, linux-riscv@lists.infradead.org,
Christoph Hellwig <hch@lst.de>,
linux-edac@vger.kernel.org
Subject: Re: [PATCH] riscv: move sifive_l2_cache.c to drivers/soc
Date: Thu, 17 Oct 2019 19:19:24 +0200 [thread overview]
Message-ID: <20191017171924.GA10928@lst.de> (raw)
In-Reply-To: <20190927225304.GA18456@lst.de>
Mauro, can you Ack this patch?
On Sat, Sep 28, 2019 at 12:53:04AM +0200, Christoph Hellwig wrote:
> > > well enough myself, and I really need to get this code out of the
> > > forced on RISC-V codebase as some SOCs I'm working with simply don't
> > > have the memory for it..
> > >
> > > So unless someone signs up to do a per-IP block edac drivers instead
> > > very quickly I'd still like to see something like this go into 5.4
> > > for now.
> >
> > I'm wandering if we should at least add an entry for this one at
> > MAINTAINERS, pointing it to the EDAC mailing list. Something like:
>
> Sounds fine. Can you also ACK the patch with that, as Paul mention
> in another thread he wants an EDAC ACK for it.
---end quoted text---
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next prev parent reply other threads:[~2019-10-17 17:19 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-08-18 8:29 [PATCH] riscv: move sifive_l2_cache.c to drivers/soc Christoph Hellwig
2019-08-19 4:44 ` Anup Patel
2019-08-19 6:09 ` Borislav Petkov
2019-08-19 6:26 ` Christoph Hellwig
2019-08-20 6:03 ` Yash Shah
2019-08-22 9:26 ` Mauro Carvalho Chehab
2019-08-31 2:53 ` Paul Walmsley
2019-09-01 8:00 ` Christoph Hellwig
2019-09-27 22:53 ` Christoph Hellwig
2019-10-17 17:19 ` Christoph Hellwig [this message]
2019-09-06 22:33 ` Paul Walmsley
2019-09-07 4:42 ` Christoph Hellwig
2019-09-06 22:27 ` Paul Walmsley
2019-09-06 22:36 ` Paul Walmsley
2019-09-07 4:40 ` Christoph Hellwig
2019-09-07 4:39 ` Christoph Hellwig
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