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* RISC-V nommu support v6
@ 2019-10-28 12:10 Christoph Hellwig
  2019-10-28 12:10 ` [PATCH 01/12] riscv: abstract out CSR names for supervisor vs machine mode Christoph Hellwig
                   ` (12 more replies)
  0 siblings, 13 replies; 40+ messages in thread
From: Christoph Hellwig @ 2019-10-28 12:10 UTC (permalink / raw)
  To: Palmer Dabbelt, Paul Walmsley; +Cc: Damien Le Moal, linux-riscv, linux-kernel

Hi all,

below is a series to support nommu mode on RISC-V.  For now this series
just works under qemu with the qemu-virt platform, but Damien has also
been able to get kernel based on this tree with additional driver hacks
to work on the Kendryte KD210, but that will take a while to cleanup
an upstream.

A git tree is available here:

    git://git.infradead.org/users/hch/riscv.git riscv-nommu.6

Gitweb:

    http://git.infradead.org/users/hch/riscv.git/shortlog/refs/heads/riscv-nommu.6

I've also pushed out a builtroot branch that can build a RISC-V nommu
root filesystem here:

   git://git.infradead.org/users/hch/buildroot.git riscv-nommu.2

Gitweb:

   http://git.infradead.org/users/hch/buildroot.git/shortlog/refs/heads/riscv-nommu.2


Changes since v5:
 - rebased to Linux 5.4-rc5 
 - fix up a newly sneaked in use of ->sepc in the perf callchain code
 - fix out of tree builds with the generated loader.lds
 - replace the plic context hack with a cleaner solution

Changes since v4:
 - rebased to 5.4-rc + latest riscv fixes
 - clean up do_trap_break
 - fix an SR_XPIE issue (Paul Walmsley)
 - use the symbolic PAGE_OFFSET value in the flat loader
   (Aurabindo Jayamohanan)

Changes since v3:
 - improve a few commit message
 - cleanup riscv_cpuid_to_hartid_mask
 - cleanup the timer handling
 - cleanup the IPI handling a little more
 - renamed CONFIG_M_MODE to CONFIG_RISCV_M_MODE
 - split out CONFIG_RISCV_SBI to make some of the ifdefs more obbious
 - use IS_ENABLED wherever possible instead of if ifdefs to make the
   code more readable

Changes since v2:
 - rebased to 5.3-rc
 - remove the EFI image header for nommu builds
 - set ARCH_SLAB_MINALIGN to ensure stack alignment in the flat binary
   loader
 - minor comment improvement
 - use #defines for more CSRs

Changes since v1:
 - fixes so that a kernel with this series still work on builds with an
   IOMMU
 - small clint cleanups
 - the binfmt_flat base and buildroot now don't put arguments on the stack

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^ permalink raw reply	[flat|nested] 40+ messages in thread

end of thread, other threads:[~2020-02-12 12:20 UTC | newest]

Thread overview: 40+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2019-10-28 12:10 RISC-V nommu support v6 Christoph Hellwig
2019-10-28 12:10 ` [PATCH 01/12] riscv: abstract out CSR names for supervisor vs machine mode Christoph Hellwig
2019-11-05 17:56   ` Paul Walmsley
2019-11-05 17:57   ` Paul Walmsley
2019-11-05 18:02     ` Marc Zyngier
2019-11-12 10:38   ` Thomas Gleixner
2019-11-14  7:30   ` Paul Walmsley
2019-10-28 12:10 ` [PATCH 02/12] riscv: don't allow selecting SBI based drivers for M-mode Christoph Hellwig
2019-11-14  7:31   ` Paul Walmsley
2019-10-28 12:10 ` [PATCH 03/12] riscv: poison SBI calls " Christoph Hellwig
2019-10-31 23:55   ` Paul Walmsley
2019-10-28 12:10 ` [PATCH 04/12] riscv: cleanup the default power off implementation Christoph Hellwig
2019-10-31 20:49   ` Paul Walmsley
2019-10-31 23:56   ` Paul Walmsley
2019-10-28 12:10 ` [PATCH 05/12] riscv: implement remote sfence.i using IPIs Christoph Hellwig
2019-10-31 23:57   ` Paul Walmsley
2019-10-28 12:10 ` [PATCH 06/12] riscv: add support for MMIO access to the timer registers Christoph Hellwig
2019-11-05 18:01   ` Paul Walmsley
2019-11-12 10:39   ` Thomas Gleixner
2019-11-17 23:06   ` Paul Walmsley
2019-10-28 12:10 ` [PATCH 07/12] riscv: provide native clint access for M-mode Christoph Hellwig
2019-10-28 12:10 ` [PATCH 08/12] riscv: read the hart ID from mhartid on boot Christoph Hellwig
2019-10-28 12:10 ` [PATCH 09/12] riscv: clear the instruction cache and all registers when booting Christoph Hellwig
2019-11-14  7:45   ` Paul Walmsley
2019-10-28 12:10 ` [PATCH 10/12] riscv: add nommu support Christoph Hellwig
2019-11-17 23:13   ` Paul Walmsley
2019-12-16 22:03     ` David Abdurachmanov
2019-12-17  3:18       ` Paul Walmsley
2019-10-28 12:10 ` [PATCH 11/12] riscv: provide a flat image loader Christoph Hellwig
2019-11-17 23:14   ` Paul Walmsley
2019-10-28 12:10 ` [PATCH 12/12] riscv: disable the EFI PECOFF header for M-mode Christoph Hellwig
2019-10-30 20:21 ` RISC-V nommu support v6 Paul Walmsley
2019-10-31 15:52   ` Christoph Hellwig
2019-10-31 20:13     ` Paul Walmsley
2019-11-23  2:19     ` Paul Walmsley
2019-12-11  8:42       ` Greentime Hu
2020-02-12 12:19       ` Greentime Hu
2019-11-11  9:47   ` Christoph Hellwig
2019-11-11 17:02     ` Paul Walmsley
2019-11-13 13:18       ` Christoph Hellwig

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