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From: Christoph Hellwig <hch@lst.de>
To: Borislav Petkov <bp@alien8.de>
Cc: tony.luck@intel.com, yash.shah@sifive.com, rrichter@marvell.com,
	james.morse@arm.com, paul.walmsley@sifive.com,
	palmer@dabbelt.com, linux-riscv@lists.infradead.org,
	mchehab@kernel.org, Christoph Hellwig <hch@lst.de>,
	linux-edac@vger.kernel.org
Subject: Re: [PATCH, resend] riscv: move sifive_l2_cache.c to drivers/soc
Date: Thu, 7 Nov 2019 10:19:25 +0100	[thread overview]
Message-ID: <20191107091925.GA10676@lst.de> (raw)
In-Reply-To: <20191106150259.GB28380@zn.tnic>

On Wed, Nov 06, 2019 at 04:02:59PM +0100, Borislav Petkov wrote:
> On Wed, Nov 06, 2019 at 03:48:59PM +0100, Christoph Hellwig wrote:
> > On Wed, Nov 06, 2019 at 10:10:13AM +0100, Borislav Petkov wrote:
> > > Also, building with a cross-compiler fails here:
> > 
> > What config?  riscv defconfig + CONFIG_SIFIVE_L2 works just fine for me.
> 
> Do you not see the one I attached?

Sorry, missed it.

The problem is that you have a modular build, which doesn't make much
sense given that the actual EDAC_SIFIVE needs to be built-in anyway.

I've changed it to bool and will resend.

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      reply	other threads:[~2019-11-07  9:19 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-11-06  1:17 [PATCH, resend] riscv: move sifive_l2_cache.c to drivers/soc Christoph Hellwig
2019-11-06  9:10 ` Borislav Petkov
2019-11-06 14:48   ` Christoph Hellwig
2019-11-06 15:02     ` Borislav Petkov
2019-11-07  9:19       ` Christoph Hellwig [this message]

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