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[99.152.116.91]) by smtp.gmail.com with ESMTPSA id s131sm65052995pfs.135.2020.01.06.15.16.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 06 Jan 2020 15:16:18 -0800 (PST) From: Olof Johansson To: paul.walmsley@sifive.com, palmer@dabbelt.com, aou@eecs.berkeley.edu Subject: [PATCH] riscv: keep 32-bit kernel to 32-bit phys_addr_t Date: Mon, 6 Jan 2020 15:16:11 -0800 Message-Id: <20200106231611.10169-1-olof@lixom.net> X-Mailer: git-send-email 2.20.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200106_151620_887637_D861E958 X-CRM114-Status: UNSURE ( 9.16 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Olof Johansson , linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org Sender: "linux-riscv" Errors-To: linux-riscv-bounces+infradead-linux-riscv=archiver.kernel.org@lists.infradead.org While rv32 technically has 34-bit physical addresses, no current platforms use it and it's likely to shake out driver bugs. Let's keep 64-bit phys_addr_t off on 32-bit builds until one shows up, since other work will be needed to make such a system useful anyway. Signed-off-by: Olof Johansson --- arch/riscv/Kconfig | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index a31169b02ec06..33a20fa046e0a 100644 --- a/arch/riscv/Kconfig +++ b/arch/riscv/Kconfig @@ -12,8 +12,9 @@ config 32BIT config RISCV def_bool y - # even on 32-bit, physical (and DMA) addresses are > 32-bits - select PHYS_ADDR_T_64BIT + # While RV32 has 34-bit physical addresses, no known platform + # uses it, so keep it to 32-bit until one shows up to test with. + select PHYS_ADDR_T_64BIT if 64BIT select OF select OF_EARLY_FLATTREE select OF_IRQ -- 2.20.1