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27 Jan 2020 18:21:22 -0800 IronPort-SDR: 34puJ9SRsX/BV5rJp7+tSp1HSuXrV64X9EzBR/aH2/qxzQo7VHZYIgTjcmYQVPq7DmptsyF5CX zyK7biyrpqgd3yx9MAdeQPA7r1KYCciJRAkLxzb4KZZ2NY83A5V6woAC1bj9Pb23frcDLTCCfl BkEvKftbbaEdN86TIlmI0fbh+ivOizrvm09IFWYcznEi8CORqANXu0UhJOtSA8yqOFGsd2M9YQ GNlI8/0SghWhwwq+2QJR4kKRrMXxFdYOBrO2ROLhwuyap6cCawgS1D2t2G3bsZeDOGJZ1hAKyB cFs= WDCIronportException: Internal Received: from jedi-01.sdcorp.global.sandisk.com (HELO jedi-01.int.fusionio.com) ([10.11.143.218]) by uls-op-cesaip01.wdc.com with ESMTP; 27 Jan 2020 18:28:07 -0800 From: Atish Patra To: linux-kernel@vger.kernel.org Subject: [PATCH v7 00/10] Add support for SBI v0.2 and CPU hotplug Date: Mon, 27 Jan 2020 18:27:27 -0800 Message-Id: <20200128022737.15371-1-atish.patra@wdc.com> X-Mailer: git-send-email 2.24.0 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200127_182808_793059_FC3E6D22 X-CRM114-Status: GOOD ( 11.56 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Albert Ou , Thomas Gleixner , Kees Cook , abner.chang@hpe.com, Vincent Chen , nickhu@andestech.com, Anup Patel , Paul Walmsley , Heiko Carstens , Mike Rapoport , clin@suse.com, Atish Patra , Geert Uytterhoeven , "Eric W. Biederman" , Greg Kroah-Hartman , Palmer Dabbelt , Greentime Hu , linux-riscv@lists.infradead.org, Borislav Petkov , Palmer Dabbelt , Mao Han Sender: "linux-riscv" Errors-To: linux-riscv-bounces+infradead-linux-riscv=archiver.kernel.org@lists.infradead.org The Supervisor Binary Interface(SBI) specification[1] now defines a base extension that provides extendability to add future extensions while maintaining backward compatibility with previous versions. The new version is defined as 0.2 and older version is marked as 0.1. This series adds support v0.2 and a unified calling convention implementation between 0.1 and 0.2. It also add other SBI v0.2 functionality defined in [2]. The base support for SBI v0.2 is already available in OpenSBI v0.5. It also adds SBI HSM extension and cpu-hotplug support for RISC-V which requires additional patches[3] in OpenSBI. [1] https://github.com/riscv/riscv-sbi-doc/blob/master/riscv-sbi.adoc [2] https://github.com/riscv/riscv-sbi-doc/pull/27 [3] http://lists.infradead.org/pipermail/opensbi/2020-January/001050.html The patches are also available in following github repositery. OpenSBI : https://github.com/atishp04/opensbi/tree/sbi_hsm_v1 Linux Kernel: https://github.com/atishp04/linux/tree/sbi_v0.2_v7 Changes from v6-v7: 1. Rebased on v5.5 2. Fixed few compilation issues for !CONFIG_SMP and !CONFIG_RISCV_SBI 3. Added SBI HSM extension 4. Add CPU hotplug support Changes from v5->v6 1. Fixed few compilation issues around config. 2. Fixed hart mask generation issues for RFENCE & IPI extensions. Changes from v4->v5 1. Fixed few minor comments related to static & inline. 2. Make sure that every patch is boot tested individually. Changes from v3->v4. 1. Rebased on for-next. 2. Fixed issuses with checkpatch --strict. 3. Unfied all IPI/fence related functions. 4. Added Hfence related SBI calls. Changes from v2->v3. 1. Moved v0.1 extensions to a new config. 2. Added support for relacement extensions of v0.1 extensions. Changes from v1->v2 1. Removed the legacy calling convention. 2. Moved all SBI related calls to sbi.c. 3. Moved all SBI related macros to uapi. Atish Patra (10): RISC-V: Mark existing SBI as 0.1 SBI. RISC-V: Add basic support for SBI v0.2 RISC-V: Add SBI v0.2 extension definitions RISC-V: Introduce a new config for SBI v0.1 RISC-V: Implement new SBI v0.2 extensions RISC-V: Add cpu_ops and modify default booting method RISC-V: Move relocate and few other functions out of __init RISC-V: Add SBI HSM extension RISC-V: Add supported for ordered booting method using HSM RISC-V: Support cpu hotplug arch/riscv/Kconfig | 18 +- arch/riscv/include/asm/cpu_ops.h | 36 ++ arch/riscv/include/asm/sbi.h | 197 +++++++---- arch/riscv/include/asm/smp.h | 14 + arch/riscv/kernel/Makefile | 2 + arch/riscv/kernel/cpu-hotplug.c | 84 +++++ arch/riscv/kernel/cpu_ops.c | 134 ++++++++ arch/riscv/kernel/head.S | 98 ++++-- arch/riscv/kernel/sbi.c | 574 ++++++++++++++++++++++++++++++- arch/riscv/kernel/setup.c | 34 +- arch/riscv/kernel/smpboot.c | 54 +-- arch/riscv/kernel/traps.c | 2 +- arch/riscv/kernel/vmlinux.lds.S | 9 +- 13 files changed, 1128 insertions(+), 128 deletions(-) create mode 100644 arch/riscv/include/asm/cpu_ops.h create mode 100644 arch/riscv/kernel/cpu-hotplug.c create mode 100644 arch/riscv/kernel/cpu_ops.c -- 2.24.0