From: Greentime Hu <greentime.hu@sifive.com>
To: greentime.hu@sifive.com, tglx@linutronix.de,
jason@lakedaemon.net, maz@kernel.org, palmer@dabbelt.com,
paul.walmsley@sifive.com, linux-kernel@vger.kernel.org,
linux-riscv@lists.infradead.org
Subject: [PATCH 1/2] irqchip/sifive-plic: Enable or disable interrupt based on its previous setting
Date: Mon, 12 Oct 2020 21:57:23 +0800 [thread overview]
Message-ID: <20201012135724.110579-1-greentime.hu@sifive.com> (raw)
It will always enable the interrupt after calling plic_set_affinity()
however it should set to its previous setting. Staying disabled or enabled.
This patch can also fix this pwm hang issue in Unleashed board.
[ 919.015783] rcu: INFO: rcu_sched detected stalls on CPUs/tasks:
[ 919.020922] rcu: 0-...0: (0 ticks this GP)
idle=7d2/1/0x4000000000000002 softirq=1424/1424 fqs=105807
[ 919.030295] (detected by 1, t=225825 jiffies, g=1561, q=3496)
[ 919.036109] Task dump for CPU 0:
[ 919.039321] kworker/0:1 R running task 0 30 2 0x00000008
[ 919.046359] Workqueue: events set_brightness_delayed
[ 919.051302] Call Trace:
[ 919.053738] [<ffffffe000930d92>] __schedule+0x194/0x4de
[ 982.035783] rcu: INFO: rcu_sched detected stalls on CPUs/tasks:
[ 982.040923] rcu: 0-...0: (0 ticks this GP)
idle=7d2/1/0x4000000000000002 softirq=1424/1424 fqs=113325
[ 982.050294] (detected by 1, t=241580 jiffies, g=1561, q=3509)
[ 982.056108] Task dump for CPU 0:
[ 982.059321] kworker/0:1 R running task 0 30 2 0x00000008
[ 982.066359] Workqueue: events set_brightness_delayed
[ 982.071302] Call Trace:
[ 982.073739] [<ffffffe000930d92>] __schedule+0x194/0x4de
[..]
Fixes: bb0fed1c60cc ("irqchip/sifive-plic: Switch to fasteoi flow")
Signed-off-by: Greentime Hu <greentime.hu@sifive.com>
---
drivers/irqchip/irq-sifive-plic.c | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/irqchip/irq-sifive-plic.c b/drivers/irqchip/irq-sifive-plic.c
index eaa3e9fe54e9..4cc8a2657a6d 100644
--- a/drivers/irqchip/irq-sifive-plic.c
+++ b/drivers/irqchip/irq-sifive-plic.c
@@ -137,6 +137,7 @@ static int plic_set_affinity(struct irq_data *d,
const struct cpumask *mask_val, bool force)
{
unsigned int cpu;
+ bool enable;
struct cpumask amask;
struct plic_priv *priv = irq_get_chip_data(d->irq);
@@ -150,8 +151,10 @@ static int plic_set_affinity(struct irq_data *d,
if (cpu >= nr_cpu_ids)
return -EINVAL;
+ enable = !irqd_irq_disabled(d);
plic_irq_toggle(&priv->lmask, d, 0);
- plic_irq_toggle(cpumask_of(cpu), d, 1);
+ /* Keep its original setting. */
+ plic_irq_toggle(cpumask_of(cpu), d, enable);
irq_data_update_effective_affinity(d, cpumask_of(cpu));
--
2.28.0
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next reply other threads:[~2020-10-12 13:57 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-10-12 13:57 Greentime Hu [this message]
2020-10-12 13:57 ` [PATCH 2/2] irqchip/sifive-plic: Fix the interrupt was enabled accidentally issue Greentime Hu
2020-10-15 21:23 ` Marc Zyngier
2020-10-16 13:42 ` Thomas Gleixner
2020-10-12 17:02 ` [PATCH 1/2] irqchip/sifive-plic: Enable or disable interrupt based on its previous setting Anup Patel
2020-10-13 1:31 ` Atish Patra
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