[PATCH 0/3] riscv: Enable some feature for RISCV

[PATCH 0/3] riscv: Enable some feature for RISCV

[Kefeng Wang]

Enable IRQ_FORCED_THREADING, GENERIC_IDLE_POLL_SETUP,
GENERIC_IRQ_SHOW_LEVEL for RISCV.

Kefeng Wang (3):
  riscv: Allow forced irq threading
  riscv: Enable idle generic idle loop
  riscv: Enable GENERIC_IRQ_SHOW_LEVEL

 arch/riscv/Kconfig | 3 +++
 1 file changed, 3 insertions(+)

-- 
2.26.2


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[PATCH 1/3] riscv: Allow forced irq threading

[Kefeng Wang]

The timer interrupt and the perf interrupt on riscv are with
IRQF_PERCPU, so it's safe to allow forced interrupt threading.

Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com>
---
 arch/riscv/Kconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index 469a70bd8da6..6356c14240c9 100644
--- a/arch/riscv/Kconfig
+++ b/arch/riscv/Kconfig
@@ -91,6 +91,7 @@ config RISCV
 	select HAVE_STACKPROTECTOR
 	select HAVE_SYSCALL_TRACEPOINTS
 	select IRQ_DOMAIN
+	select IRQ_FORCED_THREADING
 	select MODULES_USE_ELF_RELA if MODULES
 	select MODULE_SECTIONS if MODULES
 	select OF
-- 
2.26.2


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[PATCH 2/3] riscv: Enable idle generic idle loop

[Kefeng Wang]

Enable generic idle loop to support for hlt/nohlt command line options
to override default idle loop behavior.

Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com>
---
 arch/riscv/Kconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index 6356c14240c9..c3a6d63841de 100644
--- a/arch/riscv/Kconfig
+++ b/arch/riscv/Kconfig
@@ -48,6 +48,7 @@ config RISCV
 	select GENERIC_CLOCKEVENTS_BROADCAST if SMP
 	select GENERIC_EARLY_IOREMAP
 	select GENERIC_GETTIMEOFDAY if HAVE_GENERIC_VDSO
+	select GENERIC_IDLE_POLL_SETUP
 	select GENERIC_IOREMAP
 	select GENERIC_IRQ_MULTI_HANDLER
 	select GENERIC_IRQ_SHOW
-- 
2.26.2


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[PATCH 3/3] riscv: Enable GENERIC_IRQ_SHOW_LEVEL

[Kefeng Wang]

The interrupt controllers on riscv support both edge and level triggered
interrupts, it's useful to provide that information in /proc/interrupts.

Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com>
---
 arch/riscv/Kconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index c3a6d63841de..1bd3760d6bce 100644
--- a/arch/riscv/Kconfig
+++ b/arch/riscv/Kconfig
@@ -52,6 +52,7 @@ config RISCV
 	select GENERIC_IOREMAP
 	select GENERIC_IRQ_MULTI_HANDLER
 	select GENERIC_IRQ_SHOW
+	select GENERIC_IRQ_SHOW_LEVEL
 	select GENERIC_LIB_DEVMEM_IS_ALLOWED
 	select GENERIC_PCI_IOMAP
 	select GENERIC_PTDUMP if MMU
-- 
2.26.2


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Re: [PATCH 1/3] riscv: Allow forced irq threading

[Christoph Hellwig]

On Thu, Jul 08, 2021 at 09:59:47AM +0800, Kefeng Wang wrote:
> The timer interrupt and the perf interrupt on riscv are with
> IRQF_PERCPU, so it's safe to allow forced interrupt threading.

"Architecture code needs to select CONFIG_IRQ_FORCED_THREADING after
 marking the interrupts which cant be threaded IRQF_NO_THREAD.
 All interrupts which have IRQF_TIMER set are implict marked
 IRQF_NO_THREAD. Also all PER_CPU interrupts are excluded."

Did you do that audit?

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Re: [PATCH 1/3] riscv: Allow forced irq threading

[Kefeng Wang]

On 2021/7/8 13:28, Christoph Hellwig wrote:
> On Thu, Jul 08, 2021 at 09:59:47AM +0800, Kefeng Wang wrote:
>> The timer interrupt and the perf interrupt on riscv are with
>> IRQF_PERCPU, so it's safe to allow forced interrupt threading.
> "Architecture code needs to select CONFIG_IRQ_FORCED_THREADING after
>   marking the interrupts which cant be threaded IRQF_NO_THREAD.
>   All interrupts which have IRQF_TIMER set are implict marked
>   IRQF_NO_THREAD. Also all PER_CPU interrupts are excluded."
>
> Did you do that audit?

Yes, I check the perf and timer on RISCV,

arch/riscv/kernel/perf_event.c

static int reserve_pmc_hardware(void)

{

  err = request_irq(riscv_pmu->irq, riscv_pmu->handle_irq,
                                  IRQF_PERCPU, "riscv-base-perf", NULL);

}

drivers/clocksource/timer-riscv.c

static int __init riscv_timer_init_dt(struct device_node *n)

{

     error = request_percpu_irq(riscv_clock_event_irq,
riscv_timer_interrupt,
                                  "riscv-timer", &riscv_clock_event);

}

Is this enough?
> .
>

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Re: [PATCH 1/3] riscv: Allow forced irq threading

[Palmer Dabbelt]

On Wed, 07 Jul 2021 23:42:45 PDT (-0700), wangkefeng.wang@huawei.com wrote:
>
> On 2021/7/8 13:28, Christoph Hellwig wrote:
>> On Thu, Jul 08, 2021 at 09:59:47AM +0800, Kefeng Wang wrote:
>>> The timer interrupt and the perf interrupt on riscv are with
>>> IRQF_PERCPU, so it's safe to allow forced interrupt threading.
>> "Architecture code needs to select CONFIG_IRQ_FORCED_THREADING after
>>   marking the interrupts which cant be threaded IRQF_NO_THREAD.
>>   All interrupts which have IRQF_TIMER set are implict marked
>>   IRQF_NO_THREAD. Also all PER_CPU interrupts are excluded."
>>
>> Did you do that audit?
>
> Yes, I check the perf and timer on RISCV,
>
> arch/riscv/kernel/perf_event.c
>
> static int reserve_pmc_hardware(void)
>
> {
>
>   err = request_irq(riscv_pmu->irq, riscv_pmu->handle_irq,
>                                   IRQF_PERCPU, "riscv-base-perf", NULL);
>
> }
>
> drivers/clocksource/timer-riscv.c
>
> static int __init riscv_timer_init_dt(struct device_node *n)
>
> {
>
>      error = request_percpu_irq(riscv_clock_event_irq,
> riscv_timer_interrupt,
>                                   "riscv-timer", &riscv_clock_event);
>
> }
>
> Is this enough?

We also have the direct CLINT driver, but that's percpu as well.  IIUC 
this means we're OK, I've put this (and the rest of the patch set) on 
for-next.

Thanks!

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