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Mon, 26 Jul 2021 00:11:26 -0700 (PDT) Date: Mon, 26 Jul 2021 00:11:24 -0700 From: Drew Fustini To: Linus Walleij Cc: Michael Walle , Rob Herring , Bartosz Golaszewski , Paul Walmsley , Palmer Dabbelt , Michael Zhu , Geert Uytterhoeven , Fu Wei , linux-kernel , "open list:GPIO SUBSYSTEM" , linux-riscv , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , Emil Renner Berthing , Huan Feng Subject: Re: [RFC PATH 2/2] gpio: starfive-jh7100: Add StarFive JH7100 GPIO driver Message-ID: <20210726071124.GA9184@x1> References: <20210701002037.912625-1-drew@beagleboard.org> <20210701002037.912625-3-drew@beagleboard.org> <8c59105d32a9936f8806501ecd20e044@walle.cc> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210726_001130_013273_CBB563D9 X-CRM114-Status: GOOD ( 18.85 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org On Fri, Jul 23, 2021 at 11:04:41PM +0200, Linus Walleij wrote: > On Thu, Jul 1, 2021 at 8:39 AM Michael Walle wrote: > > Am 2021-07-01 02:20, schrieb Drew Fustini: > > > Add GPIO driver for the StarFive JH7100 SoC [1] used on the > > > BeagleV Starlight JH7100 board [2]. > > > > > > [1] https://github.com/starfive-tech/beaglev_doc/ > > > [2] https://github.com/beagleboard/beaglev-starlight > > > > > > Signed-off-by: Emil Renner Berthing > > > Signed-off-by: Huan Feng > > > Signed-off-by: Drew Fustini > > > > Could this driver use GPIO_REGMAP and REGMAP_IRQ? See > > drivers/gpio/gpio-sl28cpld.c for an example. > > To me it looks just memory-mapped? > > Good old gpio-mmio.c (select GPIO_GENERIC) should > suffice I think. > > Drew please look at drivers/gpio/gpio-ftgpio010.c for an example > of GPIO_GENERIC calling bgpio_init() in probe(). Thank you for the suggestion. However, I am not sure that will work for this SoC. The GPIO registers are described in section 12 of JH7100 datasheet [1] and I don't think they fit the expectation of gpio-mmio.c because there is a seperate register for each GPIO line for output data value and output enable. There are 64 output data config registers which are 4 bytes wide. There are 64 output enable config registers which are 4 bytes wide too. Output data and output enable registers for a given GPIO pad are contiguous. GPIO0_DOUT_CFG is 0x50 and GPIO0_DOEN_CFG is 0x54 while GPIO1_DOUT_CFG is 0x58 and GPIO1_DOEN_CFG is 0x5C. The stride between GPIO pads is effectively 8, which yields the formula: GPIOn_DOUT_CFG is 0x50+8n. Similarly, GPIO0_DOEN_CFG is 0x54 and thus GPIOn_DOEN_CFG is 0x54+8n. However, GPIO input data does use just one bit for each line. GPIODIN_0 at 0x48 covers GPIO[31:0] and GPIODIN_1 at 0x4c covers GPIO[63:32]. Thus the input could work with gpio-mmio but I am not sure how to reconcile the register-per-gpio for the output value and output enable. Is there way a way to adapt gpio-mmio for this situation? Thanks, Drew [1] https://github.com/starfive-tech/beaglev_doc _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv