From: <conor.dooley@microchip.com>
To: <robh+dt@kernel.org>, <damien.lemoal@wdc.com>,
<jassisinghbrar@gmail.com>, <aou@eecs.berkeley.edu>,
<paul.walmsley@sifive.com>, <palmer@dabbelt.com>,
<linux-riscv@lists.infradead.org>, <j.neuschaefer@gmx.net>,
<sfr@canb.auug.org.au>
Cc: <cyril.jean@microchip.com>, <daire.mcnamara@microchip.com>,
<atish.patra@wdc.com>, Conor Dooley <conor.dooley@microchip.com>
Subject: [PATCH] soc: add polarfire soc system controller
Date: Tue, 5 Oct 2021 13:47:43 +0100 [thread overview]
Message-ID: <20211005124743.7841-1-conor.dooley@microchip.com> (raw)
From: Conor Dooley <conor.dooley@microchip.com>
This driver provides an interface for other drivers to access the
functions of the system controller on the Microchip PolarFire SoC.
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
---
drivers/soc/Kconfig | 1 +
drivers/soc/Makefile | 1 +
drivers/soc/microchip/Kconfig | 10 ++
drivers/soc/microchip/Makefile | 1 +
drivers/soc/microchip/mpfs-sys-controller.c | 119 ++++++++++++++++++++
5 files changed, 132 insertions(+)
create mode 100644 drivers/soc/microchip/Kconfig
create mode 100644 drivers/soc/microchip/Makefile
create mode 100644 drivers/soc/microchip/mpfs-sys-controller.c
diff --git a/drivers/soc/Kconfig b/drivers/soc/Kconfig
index e8a30c4c5aec..b33142e020e0 100644
--- a/drivers/soc/Kconfig
+++ b/drivers/soc/Kconfig
@@ -12,6 +12,7 @@ source "drivers/soc/imx/Kconfig"
source "drivers/soc/ixp4xx/Kconfig"
source "drivers/soc/litex/Kconfig"
source "drivers/soc/mediatek/Kconfig"
+source "drivers/soc/microchip/Kconfig"
source "drivers/soc/qcom/Kconfig"
source "drivers/soc/renesas/Kconfig"
source "drivers/soc/rockchip/Kconfig"
diff --git a/drivers/soc/Makefile b/drivers/soc/Makefile
index a05e9fbcd3e0..e3be151e391e 100644
--- a/drivers/soc/Makefile
+++ b/drivers/soc/Makefile
@@ -17,6 +17,7 @@ obj-y += ixp4xx/
obj-$(CONFIG_SOC_XWAY) += lantiq/
obj-$(CONFIG_LITEX_SOC_CONTROLLER) += litex/
obj-y += mediatek/
+obj-y += microchip/
obj-y += amlogic/
obj-y += qcom/
obj-y += renesas/
diff --git a/drivers/soc/microchip/Kconfig b/drivers/soc/microchip/Kconfig
new file mode 100644
index 000000000000..eb656b33156b
--- /dev/null
+++ b/drivers/soc/microchip/Kconfig
@@ -0,0 +1,10 @@
+config POLARFIRE_SOC_SYS_CTRL
+ tristate "POLARFIRE_SOC_SYS_CTRL"
+ depends on POLARFIRE_SOC_MAILBOX
+ help
+ This driver adds support for the PolarFire SoC (MPFS) system controller.
+
+ To compile this driver as a module, choose M here. the
+ module will be called mpfs_system_controller.
+
+ If unsure, say N.
diff --git a/drivers/soc/microchip/Makefile b/drivers/soc/microchip/Makefile
new file mode 100644
index 000000000000..14489919fe4b
--- /dev/null
+++ b/drivers/soc/microchip/Makefile
@@ -0,0 +1 @@
+obj-$(CONFIG_POLARFIRE_SOC_SYS_CTRL) += mpfs-sys-controller.o
diff --git a/drivers/soc/microchip/mpfs-sys-controller.c b/drivers/soc/microchip/mpfs-sys-controller.c
new file mode 100644
index 000000000000..3cfee997fa59
--- /dev/null
+++ b/drivers/soc/microchip/mpfs-sys-controller.c
@@ -0,0 +1,119 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Microchip PolarFire SoC (MPFS) system controller driver
+ *
+ * Copyright (c) 2020 Microchip Corporation. All rights reserved.
+ *
+ * Author: Conor Dooley <conor.dooley@microchip.com>
+ *
+ */
+
+#include <linux/slab.h>
+#include <linux/module.h>
+#include <linux/interrupt.h>
+#include <linux/of_platform.h>
+#include <linux/mailbox_client.h>
+#include <linux/platform_device.h>
+#include <soc/microchip/mpfs.h>
+
+static DEFINE_MUTEX(transaction_lock);
+
+struct mpfs_sys_controller {
+ struct mbox_client client;
+ struct mbox_chan *chan;
+ struct completion c;
+ u32 enabled;
+};
+
+int mpfs_blocking_transaction(struct mpfs_sys_controller *mpfs_client, void *msg)
+{
+ int ret;
+
+ mutex_lock_interruptible(&transaction_lock);
+
+ reinit_completion(&mpfs_client->c);
+
+ ret = mbox_send_message(mpfs_client->chan, msg);
+ if (ret >= 0) {
+ if (wait_for_completion_timeout(&mpfs_client->c, HZ)) {
+ ret = 0;
+ } else {
+ ret = -ETIMEDOUT;
+ dev_warn(mpfs_client->client.dev, "MPFS sys controller transaction timeout\n");
+ }
+ } else {
+ dev_err(mpfs_client->client.dev,
+ "mpfs sys controller transaction returned %d\n", ret);
+ }
+
+ mutex_unlock(&transaction_lock);
+
+ return ret;
+}
+EXPORT_SYMBOL(mpfs_blocking_transaction);
+
+static void rx_callback(struct mbox_client *client, void *msg)
+{
+ struct mpfs_sys_controller *mpfs_client =
+ container_of(client, struct mpfs_sys_controller, client);
+
+ complete(&mpfs_client->c);
+}
+
+static int mpfs_sys_controller_probe(struct platform_device *pdev)
+{
+ struct device *dev = &pdev->dev;
+ struct mpfs_sys_controller *mpfs_client;
+
+ mpfs_client = devm_kzalloc(dev, sizeof(*mpfs_client), GFP_KERNEL);
+ if (!mpfs_client)
+ return -ENOMEM;
+
+ mpfs_client->client.dev = dev;
+ mpfs_client->client.rx_callback = rx_callback;
+ mpfs_client->client.tx_block = 1U;
+
+ mpfs_client->chan = mbox_request_channel(&mpfs_client->client, 0);
+ if (IS_ERR(mpfs_client->chan))
+ return dev_err_probe(dev, PTR_ERR(mpfs_client->chan),
+ "Failed to get mbox channel\n");
+
+ init_completion(&mpfs_client->c);
+
+ platform_set_drvdata(pdev, mpfs_client);
+
+ dev_info(&pdev->dev, "Registered MPFS system controller driver\n");
+
+ return 0;
+}
+
+struct mpfs_sys_controller *
+mpfs_sys_controller_get(struct device_node *mss_node)
+{
+ struct platform_device *pdev = of_find_device_by_node(mss_node);
+
+ if (!pdev)
+ return NULL;
+
+ return platform_get_drvdata(pdev);
+}
+EXPORT_SYMBOL(mpfs_sys_controller_get);
+
+static const struct of_device_id mpfs_sys_controller_of_match[] = {
+ {.compatible = "microchip,polarfire-soc-sys-controller", },
+ {},
+};
+MODULE_DEVICE_TABLE(of, mpfs_sys_controller_of_match);
+
+static struct platform_driver mpfs_sys_controller_driver = {
+ .driver = {
+ .name = "mpfs-sys-controller",
+ .of_match_table = mpfs_sys_controller_of_match,
+ },
+ .probe = mpfs_sys_controller_probe,
+};
+module_platform_driver(mpfs_sys_controller_driver);
+
+MODULE_LICENSE("GPL v2");
+MODULE_AUTHOR("Conor Dooley <conor.dooley@microchip.com>");
+MODULE_DESCRIPTION("MPFS system controller driver");
--
2.33.0
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next reply other threads:[~2021-10-05 12:47 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-10-05 12:47 conor.dooley [this message]
2021-10-21 13:13 ` [PATCH] soc: add polarfire soc system controller Conor.Dooley
2021-10-21 16:00 ` Palmer Dabbelt
2021-10-21 18:34 ` Arnd Bergmann
2021-10-22 10:26 ` Conor.Dooley
2021-11-08 15:19 ` Conor.Dooley
2021-11-08 15:38 ` Arnd Bergmann
2021-10-22 7:14 ` Conor.Dooley
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