From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 29F1AC43334 for ; Mon, 4 Jul 2022 12:16:39 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=QbZhHBjAqwWxupcuxSJC18W+6xzX/tX6JOfgzKMbhVs=; b=1iGENSttFLciAJ QZ5uR8DI8lS+DhTSOkmPirSVJgDK6wlD3seYpn9Rm6JQZD8W4/HtHPmP+oOsWWnFAG+RdUiJT0Azi phmh2lzV4/JXazl0WoSFGU0iaPXWP7ISZHY7EbsPQC1hKj27lCkMS7lMz0egBYY7RCtNo+0j46YOW s82u1oPz0J+sk7bahgaRR9heA+Jwk9jHyWcBZPu4VA3SnMCpWFEOwYVgMvwr7SqO4xQ/NtirgW6Qx zHwT/58b7iDJ4FzZ4sznH1SAwN7nkwmDBJMAfZY4plIgP6IdBk0mPCzLn72XTlWYg8H8CkTpg+6NR y9EaHwrX87MVNunaVmXQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1o8L06-008f9U-O7; Mon, 04 Jul 2022 12:16:26 +0000 Received: from esa.microchip.iphmx.com ([68.232.153.233]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1o8L03-008f8L-D9 for linux-riscv@lists.infradead.org; Mon, 04 Jul 2022 12:16:25 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1656936983; x=1688472983; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=1zpvFutj9ylvTYybbRgrTiqXegJkTTl/MiyrxahTwa8=; b=z1wQH2g+qA0WogVQBbFolbyw9HasDQTaCVJqh5CmgEZaKOmFRfmip1mt Aixzf5h1RWBrY108wPP5V3G9ZPzcLENS+bTyxxjvRzMsYqusYGwXwIKo7 WtxSgZiAAWgIfPaO9fOsWexMFx0iSASHBeXdLlIviA28/aOlitjYMjPZW WFDSaF7Acp3495HKKOLjF1FpcDlPUb8vs1e3FnIIbNtOe5QeuV47TASF2 AVDMNMpqVGCE7faQTmIwAVTRfLj0vfC5gBs39LyGPRC1H/FqCBdFlkA6z jOgReLgNrs0OgdJnoyXkuKbuovLo3JwQ+DHWjqGHYY6/w5DmxouRcwo5K Q==; X-IronPort-AV: E=Sophos;i="5.92,243,1650956400"; d="scan'208";a="180647849" Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa1.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 04 Jul 2022 05:16:22 -0700 Received: from chn-vm-ex03.mchp-main.com (10.10.85.151) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.17; Mon, 4 Jul 2022 05:16:22 -0700 Received: from wendy.microchip.com (10.10.115.15) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server id 15.1.2375.17 via Frontend Transport; Mon, 4 Jul 2022 05:16:19 -0700 From: Conor Dooley To: Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Palmer Dabbelt , Conor Dooley , Philipp Zabel , Daire McNamara CC: Paul Walmsley , Albert Ou , , , , , Rob Herring Subject: [PATCH v2 01/12] dt-bindings: clk: microchip: mpfs: add reset controller support Date: Mon, 4 Jul 2022 13:15:48 +0100 Message-ID: <20220704121558.2088698-2-conor.dooley@microchip.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220704121558.2088698-1-conor.dooley@microchip.com> References: <20220704121558.2088698-1-conor.dooley@microchip.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220704_051623_498836_02C45A86 X-CRM114-Status: GOOD ( 11.41 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org The "peripheral" devices on PolarFire SoC can be put into reset, so update the device tree binding to reflect the presence of a reset controller. Reviewed-by: Rob Herring Signed-off-by: Conor Dooley --- .../bindings/clock/microchip,mpfs.yaml | 17 +++++++++++++++-- 1 file changed, 15 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/clock/microchip,mpfs.yaml b/Documentation/devicetree/bindings/clock/microchip,mpfs.yaml index 016a4f378b9b..1d0b6a4fda42 100644 --- a/Documentation/devicetree/bindings/clock/microchip,mpfs.yaml +++ b/Documentation/devicetree/bindings/clock/microchip,mpfs.yaml @@ -40,8 +40,21 @@ properties: const: 1 description: | The clock consumer should specify the desired clock by having the clock - ID in its "clocks" phandle cell. See include/dt-bindings/clock/microchip,mpfs-clock.h - for the full list of PolarFire clock IDs. + ID in its "clocks" phandle cell. + See include/dt-bindings/clock/microchip,mpfs-clock.h for the full list of + PolarFire clock IDs. + + resets: + maxItems: 1 + + '#reset-cells': + description: + The AHB/AXI peripherals on the PolarFire SoC have reset support, so from + CLK_ENVM to CLK_CFM. The reset consumer should specify the desired + peripheral via the clock ID in its "resets" phandle cell. + See include/dt-bindings/clock/microchip,mpfs-clock.h for the full list of + PolarFire clock IDs. + const: 1 required: - compatible -- 2.36.1 _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv