From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 6F992CCA48A for ; Sun, 24 Jul 2022 12:25:58 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=5jk3WsB8334eNTcYCXwRCTFiGyK7R5KVf4kGErfDj+g=; b=dmcGWFKcgXPIbZ hzI1u44WQ6Z9fFGZia3pi85tM4icIMmhIOsunoiFSmQZIeOYz5Xzm2Iwd+Gcvuyi6bBVxlQetXmYx CXWlO2H5wk0FxowbgfbjnFRgEFBX+2FVh5Uyvt1C+qEIzSUmttlhOw8ixFn7ujyc7J0oRQRJ2jgHX FVhgbzmOrAv/AOaff8z2oOy1LkmerySv1vuN/aIfeOpvHyvH/CV5iaBnJ9fP/IQDUcW2ztJhfIW04 nf3ZYpHop0ZMOiufNaL5AKgQM4MKvxHywh1/RVM7rpCd+PYC0owdlKO7Clpn/4Guk193AIry++dqN xfV9PngMP5Gteb5vq0NQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1oFag8-0060bi-LB; Sun, 24 Jul 2022 12:25:48 +0000 Received: from ams.source.kernel.org ([145.40.68.75]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1oFag5-0060YR-Aj for linux-riscv@lists.infradead.org; Sun, 24 Jul 2022 12:25:47 +0000 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id BAED6B80D6E; Sun, 24 Jul 2022 12:25:42 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id D8681C3411E; Sun, 24 Jul 2022 12:25:35 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1658665541; bh=thtaHW8jAZpgDJtozuaQ3X5L4SWn53gdQRWmJtXyzQQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=UnTJUpGnWFgQUfFUaP/J8Gr85hqNtITgyPJ7f1lf8YOMcFr04jUI8QGAG2EgxANxL rSNPl3PymOV0CzGRikYoGCPmxfc4oEmFPAZgpRRN/C7P82V0baZnBD7Jpd00B9coJ/ ZspOuxxtg9RnIUfGkW8bnM8V8nMj8T6Ks7hvrjOLGkd+0Z0RvGA5Zm0fRcOuwv3cEF dYAXbGNDX/f/FHqbrJ47l1ZAuxHR22CZmysINqyYZ40cefYoFpJrijBG7UaioUW0xB 8NAnGWNyYqgygeS4KcEwwMt/+pqV19pmDuvLdRZi5CMl0q8FoMVZANeK0PqCtNrp/6 TGaXv+x+jYWZQ== From: guoren@kernel.org To: palmer@rivosinc.com, heiko@sntech.de, hch@infradead.org, arnd@arndb.de, peterz@infradead.org, will@kernel.org, boqun.feng@gmail.com, longman@redhat.com, mingo@redhat.com, philipp.tomsich@vrull.eu, cmuellner@linux.com, linux-kernel@vger.kernel.org, David.Laight@ACULAB.COM Cc: linux-riscv@lists.infradead.org, linux-csky@vger.kernel.org, Guo Ren , Guo Ren Subject: [PATCH V8 02/10] asm-generic: ticket-lock: Use the same struct definitions with qspinlock Date: Sun, 24 Jul 2022 08:25:09 -0400 Message-Id: <20220724122517.1019187-3-guoren@kernel.org> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220724122517.1019187-1-guoren@kernel.org> References: <20220724122517.1019187-1-guoren@kernel.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220724_052545_708697_8AA95B45 X-CRM114-Status: GOOD ( 11.26 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org From: Guo Ren Let ticket_lock use the same struct definitions with qspinlock, and then we could move to combo spinlock (combine ticket & queue). Signed-off-by: Guo Ren Signed-off-by: Guo Ren --- include/asm-generic/spinlock.h | 14 +++++++------- include/asm-generic/spinlock_types.h | 12 ++---------- 2 files changed, 9 insertions(+), 17 deletions(-) diff --git a/include/asm-generic/spinlock.h b/include/asm-generic/spinlock.h index 90803a826ba0..4773334ee638 100644 --- a/include/asm-generic/spinlock.h +++ b/include/asm-generic/spinlock.h @@ -32,7 +32,7 @@ static __always_inline void arch_spin_lock(arch_spinlock_t *lock) { - u32 val = atomic_fetch_add(1<<16, lock); + u32 val = atomic_fetch_add(1<<16, &lock->val); u16 ticket = val >> 16; if (ticket == (u16)val) @@ -46,31 +46,31 @@ static __always_inline void arch_spin_lock(arch_spinlock_t *lock) * have no outstanding writes due to the atomic_fetch_add() the extra * orderings are free. */ - atomic_cond_read_acquire(lock, ticket == (u16)VAL); + atomic_cond_read_acquire(&lock->val, ticket == (u16)VAL); smp_mb(); } static __always_inline bool arch_spin_trylock(arch_spinlock_t *lock) { - u32 old = atomic_read(lock); + u32 old = atomic_read(&lock->val); if ((old >> 16) != (old & 0xffff)) return false; - return atomic_try_cmpxchg(lock, &old, old + (1<<16)); /* SC, for RCsc */ + return atomic_try_cmpxchg(&lock->val, &old, old + (1<<16)); /* SC, for RCsc */ } static __always_inline void arch_spin_unlock(arch_spinlock_t *lock) { u16 *ptr = (u16 *)lock + IS_ENABLED(CONFIG_CPU_BIG_ENDIAN); - u32 val = atomic_read(lock); + u32 val = atomic_read(&lock->val); smp_store_release(ptr, (u16)val + 1); } static __always_inline int arch_spin_value_unlocked(arch_spinlock_t lock) { - u32 val = lock.counter; + u32 val = lock.val.counter; return ((val >> 16) == (val & 0xffff)); } @@ -84,7 +84,7 @@ static __always_inline int arch_spin_is_locked(arch_spinlock_t *lock) static __always_inline int arch_spin_is_contended(arch_spinlock_t *lock) { - u32 val = atomic_read(lock); + u32 val = atomic_read(&lock->val); return (s16)((val >> 16) - (val & 0xffff)) > 1; } diff --git a/include/asm-generic/spinlock_types.h b/include/asm-generic/spinlock_types.h index 8962bb730945..f534aa5de394 100644 --- a/include/asm-generic/spinlock_types.h +++ b/include/asm-generic/spinlock_types.h @@ -3,15 +3,7 @@ #ifndef __ASM_GENERIC_SPINLOCK_TYPES_H #define __ASM_GENERIC_SPINLOCK_TYPES_H -#include -typedef atomic_t arch_spinlock_t; - -/* - * qrwlock_types depends on arch_spinlock_t, so we must typedef that before the - * include. - */ -#include - -#define __ARCH_SPIN_LOCK_UNLOCKED ATOMIC_INIT(0) +#include +#include #endif /* __ASM_GENERIC_SPINLOCK_TYPES_H */ -- 2.36.1 _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv