From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 5F527C433FE for ; Thu, 3 Nov 2022 07:52:48 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=uKezYZvr+mcnobYA7RyXLTX1275vlPb0bkmqFlU3lBo=; b=JUtoOvOzFxrq8V ozY5HFSuaj/OD2gQNuTaQtykuGY9r/ww03oSz8xtUxQ1HBN1A/SrUX0k/zg1OvDFURzpm7v9gcVPy Kyeb4RQHEFk6eY7JZH3k46IOYNL5TJvpA7RUYzyE2UMEwWup0KJqwlDkb14qMXqRg3MoWXWlvE+T3 qN+8vxUgZYUwpCNAguNS1dhUxRg/GIRVnX//QZSssoZgBQ5u0cludsYhful679sXc3XU/S0IvxXK2 u9ueVT/DXXLkNb9CuuhP5GhjeRkyFhBds8DMXxWvwJ/VbY617gK6BnMtQByvSGLEHqUlVAzBA4lM1 No0bDKRS1+ZlIrfoeuoQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1oqV1k-00GWFI-4R; Thu, 03 Nov 2022 07:52:40 +0000 Received: from dfw.source.kernel.org ([139.178.84.217]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1oqV1g-00GWCN-IY for linux-riscv@lists.infradead.org; Thu, 03 Nov 2022 07:52:38 +0000 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 2084461D23; Thu, 3 Nov 2022 07:52:36 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id C9000C43140; Thu, 3 Nov 2022 07:52:27 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1667461955; bh=uPAVEzUw+uho6yxJPCynQKkznTRi0Kzk4knleNhHaqE=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=kfep/7KcLwnO79w/PeNqtmpbDYeOkMa8tvNBMtwafxei93IHGlEfdk7CuBGxFJnVB omSUGJJtq11u+7Qjve2hmZ6GGzvDdHtpE0C3GIJJkbFXBUGPaNM5E/hqo8BkMcvIUs odgmznutBSogV844o2Fr109c+Mcp2AW72YqQAbI8UeBo+IaVvNvYpfiFCH+NqB/AZR /GGQ2DH6s8ED1gNkKYu9uD0RjHnn2j/wRq+NSFLVweuUdvhoZMtQWgWIZX9HqK13Be N1VOg/RN+EkgZZR5/X0e3JSu+txjr15soTUS/44N1FmamVXPwXUI48Dx8orKOf0sU2 EHgviEqRzDHfg== From: guoren@kernel.org To: arnd@arndb.de, guoren@kernel.org, palmer@rivosinc.com, tglx@linutronix.de, peterz@infradead.org, luto@kernel.org, conor.dooley@microchip.com, heiko@sntech.de, jszhang@kernel.org, lazyparser@gmail.com, falcon@tinylab.org, chenhuacai@kernel.org, apatel@ventanamicro.com, atishp@atishpatra.org, palmer@dabbelt.com, paul.walmsley@sifive.com, mark.rutland@arm.com, zouyipeng@huawei.com, bigeasy@linutronix.de, David.Laight@aculab.com, chenzhongjin@huawei.com, greentime.hu@sifive.com, andy.chiu@sifive.com Cc: linux-arch@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, Guo Ren , Andreas Schwab Subject: [PATCH -next V8 09/14] riscv: Add config of thread stack size Date: Thu, 3 Nov 2022 03:50:42 -0400 Message-Id: <20221103075047.1634923-10-guoren@kernel.org> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20221103075047.1634923-1-guoren@kernel.org> References: <20221103075047.1634923-1-guoren@kernel.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20221103_005236_767271_F0AD0386 X-CRM114-Status: GOOD ( 11.95 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org From: Guo Ren 0cac21b02ba5 ("risc v: use 16KB kernel stack on 64-bit") increase the thread size mandatory, but some scenarios, such as D1 with a small memory footprint, would suffer from that. After independent irq stack support, let's give users a choice to determine their custom stack size. Signed-off-by: Guo Ren Signed-off-by: Guo Ren Cc: Andreas Schwab --- arch/riscv/Kconfig | 10 ++++++++++ arch/riscv/include/asm/thread_info.h | 12 +----------- 2 files changed, 11 insertions(+), 11 deletions(-) diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index 85241415a935..df067b225757 100644 --- a/arch/riscv/Kconfig +++ b/arch/riscv/Kconfig @@ -454,6 +454,16 @@ config IRQ_STACKS Add independent irq & softirq stacks for percpu to prevent kernel stack overflows. We may save some memory footprint by disabling IRQ_STACKS. +config THREAD_SIZE_ORDER + int "Kernel stack size (in power-of-two numbers of page size)" if VMAP_STACK && EXPERT + range 0 4 + default 1 if 32BIT && !KASAN + default 3 if 64BIT && KASAN + default 2 + help + Specify the Pages of thread stack size (from 4KB to 64KB), which also + affects irq stack size, which is equal to thread stack size. + endmenu # "Platform type" menu "Kernel features" diff --git a/arch/riscv/include/asm/thread_info.h b/arch/riscv/include/asm/thread_info.h index 043da8ccc7e6..c970d41dc4c6 100644 --- a/arch/riscv/include/asm/thread_info.h +++ b/arch/riscv/include/asm/thread_info.h @@ -11,18 +11,8 @@ #include #include -#ifdef CONFIG_KASAN -#define KASAN_STACK_ORDER 1 -#else -#define KASAN_STACK_ORDER 0 -#endif - /* thread information allocation */ -#ifdef CONFIG_64BIT -#define THREAD_SIZE_ORDER (2 + KASAN_STACK_ORDER) -#else -#define THREAD_SIZE_ORDER (1 + KASAN_STACK_ORDER) -#endif +#define THREAD_SIZE_ORDER CONFIG_THREAD_SIZE_ORDER #define THREAD_SIZE (PAGE_SIZE << THREAD_SIZE_ORDER) /* -- 2.36.1 _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv