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From: Conor Dooley <conor.dooley@microchip.com>
To: Catalin Marinas <catalin.marinas@arm.com>
Cc: Jisheng Zhang <jszhang@kernel.org>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	<linux-riscv@lists.infradead.org>, <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH 5/6] riscv: allow kmalloc() caches aligned to the smallest value
Date: Tue, 30 May 2023 11:34:06 +0100	[thread overview]
Message-ID: <20230530-gyration-handheld-ef4e44e89d61@wendy> (raw)
In-Reply-To: <ZHXJDevEVwUEoOq4@arm.com>


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On Tue, May 30, 2023 at 10:59:41AM +0100, Catalin Marinas wrote:
> On Mon, May 29, 2023 at 12:17:46PM +0100, Conor Dooley wrote:
> > On Sat, May 27, 2023 at 12:59:57AM +0800, Jisheng Zhang wrote:
> > > After this patch, a simple test of booting to a small buildroot rootfs
> > > on qemu shows:
> > > 
> > > kmalloc-96           5041    5041     96  ...
> > > kmalloc-64           9606    9606     64  ...
> > > kmalloc-32           5128    5128     32  ...
> > > kmalloc-16           7682    7682     16  ...
> > > kmalloc-8           10246   10246      8  ...
> > > 
> > > So we save about 1268KB memory. The saving will be much larger in normal
> > > OS env on real HW platforms.
> > > 
> > > [1] Link: https://lore.kernel.org/linux-arm-kernel/20230524171904.3967031-1-catalin.marinas@arm.com/

While I think of it, Link: goes at the start of the line, the [1] should
go at the end (although I don't think you actually reference the link
anywhere in the text & it'll probably not be particularly relevant if a
subsequent revision of that patchset is applied.

> > > 
> > > Signed-off-by: Jisheng Zhang <jszhang@kernel.org>
> > 
> > Fails to build chief, with loads of:
> > linux/dma-mapping.h:546:19: error: redefinition of 'dma_get_cache_alignment'
> > 
> > And for 32-bit there's also a rake of:
> > include/linux/slab.h:239:9: warning: 'ARCH_KMALLOC_MINALIGN' macro redefined [-Wmacro-redefined]
> > 
> > At the very least, reproducable with rv32_defconfig.
> 
> Have you this it on top of the KMALLOC_MINALIGN preparation series?
> 
> https://lore.kernel.org/r/20230524171904.3967031-1-catalin.marinas@arm.com/

Oh, no. Thanks for pointing that out.
Our automation stuff only uses what is in riscv/{for-next,master,fixes}.
Unless my reading comprehension is particularly bad of late it was
non-obvious that this depended on something that had not yet been
applied - it sounded like your series had already been merged last year.
Apologies for the noise then on this patch, but please try to be more
clear about what the dependencies actually are Jisheng.

Cheers,
Conor.

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  reply	other threads:[~2023-05-30 10:34 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-05-26 16:59 [PATCH 0/6] riscv: Reduce ARCH_KMALLOC_MINALIGN to 8 Jisheng Zhang
2023-05-26 16:59 ` [PATCH 1/6] riscv: errata: thead: only set cbom size & noncoherent during boot Jisheng Zhang
2023-05-29 10:42   ` Conor Dooley
2023-05-26 16:59 ` [PATCH 2/6] riscv: mm: mark CBO relate initialization funcs as __init Jisheng Zhang
2023-05-29 10:44   ` Conor Dooley
2023-05-26 16:59 ` [PATCH 3/6] riscv: mm: mark noncoherent_supported as __ro_after_init Jisheng Zhang
2023-05-29 10:53   ` Conor Dooley
2023-05-26 16:59 ` [PATCH 4/6] riscv: mm: pass noncoherent or not to riscv_noncoherent_supported() Jisheng Zhang
2023-05-29 11:13   ` Conor Dooley
2023-05-31 15:24     ` Jisheng Zhang
2023-05-31 15:28       ` Jisheng Zhang
2023-05-31 16:28         ` Conor Dooley
2023-06-01  3:40           ` Jisheng Zhang
2023-05-26 16:59 ` [PATCH 5/6] riscv: allow kmalloc() caches aligned to the smallest value Jisheng Zhang
2023-05-29 11:17   ` Conor Dooley
2023-05-30  9:59     ` Catalin Marinas
2023-05-30 10:34       ` Conor Dooley [this message]
2023-05-30 13:08         ` Catalin Marinas
2023-05-31 14:52           ` Jisheng Zhang
2023-05-26 16:59 ` [PATCH 6/6] riscv: enable DMA_BOUNCE_UNALIGNED_KMALLOC for !dma_coherent Jisheng Zhang

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