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From: Conor Dooley <conor@kernel.org>
To: Chen Wang <unicornxw@gmail.com>
Cc: aou@eecs.berkeley.edu, chao.wei@sophgo.com,
	krzysztof.kozlowski+dt@linaro.org, mturquette@baylibre.com,
	palmer@dabbelt.com, paul.walmsley@sifive.com,
	richardcochran@gmail.com, robh+dt@kernel.org, sboyd@kernel.org,
	devicetree@vger.kernel.org, linux-clk@vger.kernel.org,
	linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org,
	haijiao.liu@sophgo.com, xiaoguang.xing@sophgo.com,
	Chen Wang <unicorn_wang@outlook.com>
Subject: Re: [PATCH 2/5] dt-bindings: soc: sophgo: Add Sophgo syscon module
Date: Tue, 14 Nov 2023 17:40:20 +0000	[thread overview]
Message-ID: <20231114-timid-habitat-a06e52e59c9c@squawk> (raw)
In-Reply-To: <3c286171af30101b88f0aaf645fb0a7d5880ac0a.1699879741.git.unicorn_wang@outlook.com>


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On Mon, Nov 13, 2023 at 09:19:02PM +0800, Chen Wang wrote:
> From: Chen Wang <unicorn_wang@outlook.com>
> 
> Add documentation to describe Sophgo System Controller Registers for
> SG2042.
> 
> Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
> ---
>  .../soc/sophgo/sophgo,sg2042-syscon.yaml      | 38 +++++++++++++++++++
>  1 file changed, 38 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/soc/sophgo/sophgo,sg2042-syscon.yaml
> 
> diff --git a/Documentation/devicetree/bindings/soc/sophgo/sophgo,sg2042-syscon.yaml b/Documentation/devicetree/bindings/soc/sophgo/sophgo,sg2042-syscon.yaml
> new file mode 100644
> index 000000000000..829abede4fd5
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/soc/sophgo/sophgo,sg2042-syscon.yaml
> @@ -0,0 +1,38 @@
> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/soc/sophgo/sophgo,sg2042-syscon.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Sophgo SG2042 SoC system controller
> +
> +maintainers:
> +  - Chen Wang <unicorn_wang@outlook.com>
> +
> +description:
> +  The Sophgo SG2042 SoC system controller provides register information such
> +  as offset, mask and shift to configure related modules.
> +
> +properties:
> +  compatible:
> +    oneOf:
> +      - items:
> +          - enum:
> +              - sophgo,sg2042-syscon
> +          - const: syscon

THere's only one option here, so the oneOf should be removed. Similarly,
since there's only one SoC, and it sounds like the next large sophgo
system is going to be using an entirely different core provider, I think
should just simplify this to a pair of "const:" entries.

> +
> +  reg:
> +    maxItems: 1
> +
> +required:
> +  - compatible
> +  - reg
> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +    syscon@30010000 {
> +        compatible = "sophgo,sg2042-syscon", "syscon";
> +        reg = <0x30010000 0x1000>;
> +    };

Per my comments elsewhere, I think the clock controller should be a
child of this node, rather than an unrelated node, linked by a phandle.

Cheers,
Conor.

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  reply	other threads:[~2023-11-14 17:40 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-11-13 13:16 [PATCH 0/5] riscv: sophgo: add clock support for sg2042 Chen Wang
2023-11-13 13:18 ` [PATCH 1/5] dt-bindings: clock: sophgo: Add SG2042 clock definitions Chen Wang
2023-11-14 17:35   ` Conor Dooley
2023-11-15  1:12     ` Chen Wang
2023-11-13 13:19 ` [PATCH 2/5] dt-bindings: soc: sophgo: Add Sophgo syscon module Chen Wang
2023-11-14 17:40   ` Conor Dooley [this message]
2023-11-15  1:27     ` Chen Wang
2023-11-16 18:13     ` Rob Herring
2023-11-13 13:19 ` [PATCH 3/5] dt-bindings: clock: sophgo: Add SG2042 bindings Chen Wang
2023-11-16 18:18   ` Rob Herring
2023-11-17  0:34     ` Chen Wang
2023-11-13 13:19 ` [PATCH 4/5] clk: sophgo: Add SG2042 clock generator driver Chen Wang
2023-11-15 13:02   ` kernel test robot
2023-11-19 11:11   ` kernel test robot
2023-11-13 13:20 ` [PATCH 5/5] riscv: dts: add clock generator for Sophgo SG2042 SoC Chen Wang
2023-11-14 17:31   ` Conor Dooley
2023-11-15  1:34     ` Chen Wang
2023-11-15  2:15       ` Samuel Holland
2023-11-15  2:34         ` Chen Wang

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