From: Marc Zyngier <maz@kernel.org>
To: Yash Shah <yash.shah@sifive.com>
Cc: mark.rutland@arm.com, devicetree@vger.kernel.org,
aou@eecs.berkeley.edu, jason@lakedaemon.net, atish.patra@wdc.com,
Sachin Ghadi <sachin.ghadi@sifive.com>,
Linus Walleij <linus.walleij@linaro.org>,
linux-kernel@vger.kernel.org, bgolaszewski@baylibre.com,
robh+dt@kernel.org, palmer@dabbelt.com,
Sagar Kadam <sagar.kadam@sifive.com>,
linux-gpio@vger.kernel.org,
"Paul Walmsley \( Sifive\)" <paul.walmsley@sifive.com>,
tglx@linutronix.de, bmeng.cn@gmail.com,
linux-riscv@lists.infradead.org
Subject: RE: [PATCH v3 5/6] gpio: sifive: Add GPIO driver for SiFive SoCs
Date: Fri, 29 Nov 2019 09:12:10 +0000 [thread overview]
Message-ID: <208a63e8819b84f9dc03f270f2606294@www.loen.fr> (raw)
In-Reply-To: <CH2PR13MB33682C26386CB4EE8A7EA1C98C460@CH2PR13MB3368.namprd13.prod.outlook.com>
On 2019-11-29 06:27, Yash Shah wrote:
>> -----Original Message-----
>> From: Linus Walleij <linus.walleij@linaro.org>
>> Sent: 28 November 2019 17:50
>> To: Yash Shah <yash.shah@sifive.com>
>> Cc: bgolaszewski@baylibre.com; robh+dt@kernel.org;
>> mark.rutland@arm.com; palmer@dabbelt.com; Paul Walmsley ( Sifive)
>> <paul.walmsley@sifive.com>; aou@eecs.berkeley.edu;
>> tglx@linutronix.de;
>> jason@lakedaemon.net; maz@kernel.org; bmeng.cn@gmail.com;
>> atish.patra@wdc.com; Sagar Kadam <sagar.kadam@sifive.com>; linux-
>> gpio@vger.kernel.org; devicetree@vger.kernel.org; linux-
>> riscv@lists.infradead.org; linux-kernel@vger.kernel.org; Sachin
>> Ghadi
>> <sachin.ghadi@sifive.com>
>> Subject: Re: [PATCH v3 5/6] gpio: sifive: Add GPIO driver for SiFive
>> SoCs
>>
>> On Mon, Nov 25, 2019 at 6:58 AM Yash Shah <yash.shah@sifive.com>
>> wrote:
>>
>> > Adds the GPIO driver for SiFive RISC-V SoCs.
>> >
>> > Signed-off-by: Wesley W. Terpstra <wesley@sifive.com>
>> > [Atish: Various fixes and code cleanup]
>> > Signed-off-by: Atish Patra <atish.patra@wdc.com>
>> > Signed-off-by: Yash Shah <yash.shah@sifive.com>
>>
>> Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
>>
>> I suppose Marc will merge all patches into the irqchip tree as they
>> are logically
>> dependent? If you want the GPIO bindings and this driver directly
>> merged
>> (no deps) then I can do that as well.
>
> Yes, the GPIO driver have logical dependency on irqchip patches. It
> is best if Marc merges all the patches into the irqchip tree.
>
> @Marc Zyngier, Are you going to merge all the patches into the
> irqchip tree?
I'm happy to pick this up, but that's definitely 5.6 material as
I stopped collecting new 5.5 features a couple of weeks ago.
Thanks,
M.
--
Jazz is not dead. It just smells funny...
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next prev parent reply other threads:[~2019-11-29 9:12 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-11-25 5:57 [PATCH v3 0/6] GPIO & Hierarchy IRQ support for HiFive Unleashed Yash Shah
2019-11-25 5:57 ` [PATCH v3 1/6] genirq: introduce irq_domain_translate_onecell Yash Shah
2019-11-25 5:57 ` [PATCH v3 2/6] irqchip: nvic: Use irq_domain_translate_onecell instead of custom func Yash Shah
2019-11-25 5:57 ` [PATCH v3 3/6] irqchip: sifive: Support hierarchy irq domain Yash Shah
2019-11-25 5:58 ` [PATCH v3 4/6] gpio: sifive: Add DT documentation for SiFive GPIO Yash Shah
2019-11-28 12:18 ` Linus Walleij
2019-12-05 17:27 ` Rob Herring
2019-11-25 5:58 ` [PATCH v3 5/6] gpio: sifive: Add GPIO driver for SiFive SoCs Yash Shah
2019-11-25 14:02 ` Bartosz Golaszewski
2019-11-28 12:20 ` Linus Walleij
2019-11-29 6:27 ` Yash Shah
2019-11-29 9:12 ` Marc Zyngier [this message]
2019-12-07 1:07 ` Palmer Dabbelt
2019-11-25 5:58 ` [PATCH v3 6/6] riscv: dts: Add DT support for SiFive FU540 GPIO driver Yash Shah
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