From: "Jernej Škrabec" <jernej.skrabec@gmail.com>
To: Chen-Yu Tsai <wens@csie.org>,
linux-sunxi@lists.linux.dev, Palmer Dabbelt <palmer@dabbelt.com>,
Conor Dooley <conor@kernel.org>,
linux-riscv@lists.infradead.org,
Samuel Holland <samuel@sholland.org>
Cc: devicetree@vger.kernel.org,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Rob Herring <robh+dt@kernel.org>,
Heiko Stuebner <heiko@sntech.de>,
Jisheng Zhang <jszhang@kernel.org>,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org,
Andre Przywara <andre.przywara@arm.com>,
Samuel Holland <samuel@sholland.org>,
Albert Ou <aou@eecs.berkeley.edu>,
Anup Patel <apatel@ventanamicro.com>,
Atish Patra <atishp@rivosinc.com>,
Christian Hewitt <christianshewitt@gmail.com>,
Conor Dooley <conor.dooley@microchip.com>,
Guo Ren <guoren@kernel.org>,
Heinrich Schuchardt <heinrich.schuchardt@canonical.com>,
Linus Walleij <linus.walleij@linaro.org>,
Paul Walmsley <paul.walmsley@sifive.com>,
Stanislav Jakubek <stano.jakubek@gmail.com>
Subject: Re: [PATCH v2 09/12] riscv: dts: allwinner: Add Dongshan Nezha STU devicetree
Date: Mon, 05 Dec 2022 21:45:48 +0100 [thread overview]
Message-ID: <3389289.QJadu78ljV@kista> (raw)
In-Reply-To: <20221125234656.47306-10-samuel@sholland.org>
Hi Samuel,
Dne sobota, 26. november 2022 ob 00:46:53 CET je Samuel Holland napisal(a):
> The 100ask Dongshan Nezha STU is a system-on-module that can be used
> standalone or with a carrier board. The SoM provides gigabit Ethernet,
> HDMI, a USB peripheral port, and WiFi/Bluetooth via an RTL8723DS chip.
>
> The "DIY" carrier board exposes almost every pin from the D1 SoC to 0.1"
> headers, but contains no digital circuitry, so it does not have its own
> devicetree.
>
> Signed-off-by: Samuel Holland <samuel@sholland.org>
> ---
>
> (no changes since v1)
>
> arch/riscv/boot/dts/allwinner/Makefile | 1 +
> .../sun20i-d1-dongshan-nezha-stu.dts | 118 ++++++++++++++++++
> 2 files changed, 119 insertions(+)
> create mode 100644
> arch/riscv/boot/dts/allwinner/sun20i-d1-dongshan-nezha-stu.dts
>
> diff --git a/arch/riscv/boot/dts/allwinner/Makefile
> b/arch/riscv/boot/dts/allwinner/Makefile index 2ed586fafaea..87f70b1af6b4
> 100644
> --- a/arch/riscv/boot/dts/allwinner/Makefile
> +++ b/arch/riscv/boot/dts/allwinner/Makefile
> @@ -1,4 +1,5 @@
> # SPDX-License-Identifier: GPL-2.0
> +dtb-$(CONFIG_ARCH_SUNXI) += sun20i-d1-dongshan-nezha-stu.dtb
> dtb-$(CONFIG_ARCH_SUNXI) += sun20i-d1-lichee-rv-86-panel-480p.dtb
> dtb-$(CONFIG_ARCH_SUNXI) += sun20i-d1-lichee-rv-86-panel-720p.dtb
> dtb-$(CONFIG_ARCH_SUNXI) += sun20i-d1-lichee-rv-dock.dtb
> diff --git a/arch/riscv/boot/dts/allwinner/sun20i-d1-dongshan-nezha-stu.dts
> b/arch/riscv/boot/dts/allwinner/sun20i-d1-dongshan-nezha-stu.dts new file
> mode 100644
> index 000000000000..c549a1c5fbf0
> --- /dev/null
> +++ b/arch/riscv/boot/dts/allwinner/sun20i-d1-dongshan-nezha-stu.dts
> @@ -0,0 +1,118 @@
> +// SPDX-License-Identifier: (GPL-2.0+ or MIT)
> +// Copyright (C) 2022 Samuel Holland <samuel@sholland.org>
> +
> +#include <dt-bindings/gpio/gpio.h>
> +#include <dt-bindings/leds/common.h>
> +
> +/dts-v1/;
> +
> +#include "sun20i-d1.dtsi"
> +#include "sun20i-common-regulators.dtsi"
> +
> +/ {
> + model = "Dongshan Nezha STU";
> + compatible = "100ask,dongshan-nezha-stu", "allwinner,sun20i-d1";
> +
> + aliases {
> + ethernet0 = &emac;
> + mmc0 = &mmc0;
Sorry, I just noticed now, but why is there above alias? It's not sunxi
practice to add mmc aliases.
Best regards,
Jernej
> + serial0 = &uart0;
> + };
> +
> + chosen {
> + stdout-path = "serial0:115200n8";
> + };
> +
> + leds {
> + compatible = "gpio-leds";
> +
> + led-0 {
> + color = <LED_COLOR_ID_GREEN>;
> + function = LED_FUNCTION_STATUS;
> + gpios = <&pio 2 1 GPIO_ACTIVE_HIGH>; /* PC1
*/
> + };
> + };
> +
> + reg_usbvbus: usbvbus {
> + compatible = "regulator-fixed";
> + regulator-name = "usbvbus";
> + regulator-min-microvolt = <5000000>;
> + regulator-max-microvolt = <5000000>;
> + gpio = <&pio 3 19 GPIO_ACTIVE_HIGH>; /* PD19 */
> + enable-active-high;
> + vin-supply = <®_vcc>;
> + };
> +
> + /*
> + * This regulator is PWM-controlled, but the PWM controller is not
> + * yet supported, so fix the regulator to its default voltage.
> + */
> + reg_vdd_cpu: vdd-cpu {
> + compatible = "regulator-fixed";
> + regulator-name = "vdd-cpu";
> + regulator-min-microvolt = <1100000>;
> + regulator-max-microvolt = <1100000>;
> + vin-supply = <®_vcc>;
> + };
> +};
> +
> +&cpu0 {
> + cpu-supply = <®_vdd_cpu>;
> +};
> +
> +&dcxo {
> + clock-frequency = <24000000>;
> +};
> +
> +&ehci0 {
> + status = "okay";
> +};
> +
> +&emac {
> + pinctrl-0 = <&rgmii_pe_pins>;
> + pinctrl-names = "default";
> + phy-handle = <&ext_rgmii_phy>;
> + phy-mode = "rgmii-id";
> + phy-supply = <®_vcc_3v3>;
> + status = "okay";
> +};
> +
> +&mdio {
> + ext_rgmii_phy: ethernet-phy@1 {
> + compatible = "ethernet-phy-ieee802.3-c22";
> + reg = <1>;
> + };
> +};
> +
> +&mmc0 {
> + broken-cd;
> + bus-width = <4>;
> + disable-wp;
> + vmmc-supply = <®_vcc_3v3>;
> + vqmmc-supply = <®_vcc_3v3>;
> + pinctrl-0 = <&mmc0_pins>;
> + pinctrl-names = "default";
> + status = "okay";
> +};
> +
> +&ohci0 {
> + status = "okay";
> +};
> +
> +&uart0 {
> + pinctrl-0 = <&uart0_pb8_pins>;
> + pinctrl-names = "default";
> + status = "okay";
> +};
> +
> +&usb_otg {
> + dr_mode = "otg";
> + status = "okay";
> +};
> +
> +&usbphy {
> + usb0_id_det-gpios = <&pio 3 21 GPIO_ACTIVE_HIGH>; /* PD21 */
> + usb0_vbus_det-gpios = <&pio 3 20 GPIO_ACTIVE_HIGH>; /* PD20 */
> + usb0_vbus-supply = <®_usbvbus>;
> + status = "okay";
> +};
> --
> 2.37.4
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next prev parent reply other threads:[~2022-12-05 20:46 UTC|newest]
Thread overview: 55+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-11-25 23:46 [PATCH v2 00/12] riscv: Allwinner D1/D1s platform support Samuel Holland
2022-11-25 23:46 ` [PATCH v2 01/12] MAINTAINERS: Match the sun20i family of Allwinner SoCs Samuel Holland
2022-11-26 0:12 ` Guo Ren
2022-12-05 20:22 ` Jernej Škrabec
2022-11-25 23:46 ` [PATCH v2 02/12] dt-bindings: vendor-prefixes: Add Allwinner D1/D1s board vendors Samuel Holland
2022-11-26 0:14 ` Guo Ren
2022-11-25 23:46 ` [PATCH v2 03/12] dt-bindings: riscv: Add Allwinner D1/D1s board compatibles Samuel Holland
2022-11-26 0:15 ` Guo Ren
2022-11-26 15:54 ` Conor Dooley
2022-11-28 20:55 ` Heiko Stübner
2022-11-25 23:46 ` [PATCH v2 04/12] riscv: dts: allwinner: Add the D1/D1s SoC devicetree Samuel Holland
2022-11-26 16:03 ` Conor Dooley
2022-12-02 8:27 ` Icenowy Zheng
2022-11-27 17:41 ` Andre Przywara
2022-11-27 19:22 ` Samuel Holland
2022-12-05 20:29 ` Jernej Škrabec
2022-12-02 8:29 ` Icenowy Zheng
2022-11-28 13:34 ` Bin Meng
2022-11-28 20:59 ` Heiko Stübner
2022-11-25 23:46 ` [PATCH v2 05/12] riscv: dts: allwinner: Add MangoPi MQ devicetree Samuel Holland
2022-11-26 0:20 ` Guo Ren
2022-12-05 20:32 ` Jernej Škrabec
2022-11-25 23:46 ` [PATCH v2 06/12] riscv: dts: allwinner: Add Allwinner D1 Nezha devicetree Samuel Holland
2022-11-26 0:21 ` Guo Ren
2022-11-26 16:19 ` Conor Dooley
2022-11-28 21:01 ` Heiko Stübner
2022-12-05 20:33 ` Jernej Škrabec
2022-11-25 23:46 ` [PATCH v2 07/12] riscv: dts: allwinner: Add Sipeed Lichee RV devicetrees Samuel Holland
2022-12-05 20:42 ` Jernej Škrabec
2022-11-25 23:46 ` [PATCH v2 08/12] riscv: dts: allwinner: Add MangoPi MQ Pro devicetree Samuel Holland
2022-11-26 0:25 ` Guo Ren
2022-12-05 20:42 ` Jernej Škrabec
2022-11-25 23:46 ` [PATCH v2 09/12] riscv: dts: allwinner: Add Dongshan Nezha STU devicetree Samuel Holland
2022-11-26 0:25 ` Guo Ren
2022-12-05 20:43 ` Jernej Škrabec
2022-12-05 20:45 ` Jernej Škrabec [this message]
2022-11-25 23:46 ` [PATCH v2 10/12] riscv: dts: allwinner: Add ClockworkPi and DevTerm devicetrees Samuel Holland
2022-11-25 23:46 ` [PATCH v2 11/12] riscv: Add the Allwinner SoC family Kconfig option Samuel Holland
2022-11-26 0:23 ` Guo Ren
2022-11-26 16:36 ` Conor Dooley
2022-11-27 11:31 ` Guo Ren
2022-11-28 21:05 ` Heiko Stübner
2022-11-25 23:46 ` [PATCH v2 12/12] riscv: defconfig: Enable the Allwinner D1 platform and drivers Samuel Holland
2022-11-26 0:24 ` Guo Ren
2022-12-02 8:34 ` Icenowy Zheng
2022-11-26 16:40 ` Conor Dooley
2022-11-28 21:11 ` Heiko Stübner
2022-11-28 21:17 ` Conor Dooley
2022-11-29 6:49 ` Andrew Jones
2022-11-29 6:54 ` Conor Dooley
2022-11-30 20:24 ` Palmer Dabbelt
2022-11-30 21:49 ` Arnd Bergmann
2022-12-01 0:31 ` Andre Przywara
2022-11-26 10:24 ` [PATCH v2 00/12] riscv: Allwinner D1/D1s platform support Conor Dooley
2022-12-02 17:55 ` Palmer Dabbelt
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