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From: <Conor.Dooley@microchip.com>
To: <sudeep.holla@arm.com>, <palmer@dabbelt.com>,
	<catalin.marinas@arm.com>, <will@kernel.org>
Cc: <linux-riscv@lists.infradead.org>, <linux-kernel@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>, <atishp@atishpatra.org>,
	<Brice.Goglin@inria.fr>, <gregkh@linuxfoundation.org>
Subject: [GIT PULL] Fix RISC-V's arch-topology reporting
Date: Mon, 15 Aug 2022 22:14:55 +0000	[thread overview]
Message-ID: <4849490e-b362-c13a-c2e4-82acc3268a3f@microchip.com> (raw)

Hey Will/Palmer/Sudeep,

Catalin suggested [0] dropping the CC: stable for the arm64 patch and
instead making it a specific prereq of the RISC-V patch & making a PR,
so here we are.. I was still up when -rc1 came out so pushed it last
night to get the test coverage, but LKP seems to not have reported a
build success since early on the 13th so not holding my horses! I built
it again for both ARMs and RISC-V myself.

I tagged it tonight, so it's on conor/linux.git as riscv-topo-on-6.0-rc1
with the prereq specified.

Not sure if you want to merge this too Sudeep or if that's up to Greg?

Thanks,
Conor.

0 - https://lore.kernel.org/linux-riscv/Ytac7G1zlq6WW4jt@arm.com/

The following changes since commit 568035b01cfb107af8d2e4bd2fb9aea22cf5b868:

  Linux 6.0-rc1 (2022-08-14 15:50:18 -0700)

are available in the Git repository at:

  https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux.git/ tags/riscv-topo-on-6.0-rc1

for you to fetch changes up to fbd92809997a391f28075f1c8b5ee314c225557c:

  riscv: topology: fix default topology reporting (2022-08-15 22:07:34 +0100)

----------------------------------------------------------------
Fix RISC-V's topology reporting

The goal here is the fix the incorrectly reported arch topology on
RISC-V which seems to have been broken since it was added.
cpu, package and thread IDs are all currently reported as -1, so tools
like lstopo think systems have multiple threads on the same core when
this is not true:
https://github.com/open-mpi/hwloc/issues/536

arm64's topology code basically applies to RISC-V too, so it has been
made generic along with the removal of MPIDR related code, which
appears to be redudant code since '3102bc0e6ac7 ("arm64: topology: Stop
using MPIDR for topology information")' replaced the code that actually
interacted with MPIDR with default values.

----------------------------------------------------------------
Conor Dooley (2):
      arm64: topology: move store_cpu_topology() to shared code
      riscv: topology: fix default topology reporting

 arch/arm64/kernel/topology.c | 40 ----------------------------------------
 arch/riscv/Kconfig           |  2 +-
 arch/riscv/kernel/smpboot.c  |  3 ++-
 drivers/base/arch_topology.c | 19 +++++++++++++++++++
 4 files changed, 22 insertions(+), 42 deletions(-)
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             reply	other threads:[~2022-08-15 22:15 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-08-15 22:14 Conor.Dooley [this message]
2022-08-16  9:12 ` [GIT PULL] Fix RISC-V's arch-topology reporting Sudeep Holla
2022-08-18 21:03 ` Palmer Dabbelt
2022-08-18 21:10   ` Conor.Dooley
2022-08-18 21:15     ` Palmer Dabbelt
2022-09-07 16:39 ` Conor.Dooley
2022-09-07 16:41   ` Will Deacon
2022-09-07 16:44     ` Conor.Dooley

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