From: Andreas Schwab <schwab@linux-m68k.org>
To: Zong Li <zong.li@sifive.com>
Cc: Paul Walmsley <paul.walmsley@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Stephen Boyd <sboyd@kernel.org>,
Pragnesh Patel <pragnesh.patel@openfive.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Michael Turquette <mturquette@baylibre.com>,
"linux-kernel@vger.kernel.org List"
<linux-kernel@vger.kernel.org>,
linux-clk@vger.kernel.org,
linux-riscv <linux-riscv@lists.infradead.org>
Subject: Re: [PATCH v7 0/5] clk: add driver for the SiFive FU740
Date: Mon, 29 Mar 2021 12:37:55 +0200 [thread overview]
Message-ID: <87h7kukzy4.fsf@igel.home> (raw)
In-Reply-To: <CANXhq0rE-ZcPBp02Pvozpk_s-j6NhxHUmso75uz6ji9bejO8gA@mail.gmail.com> (Zong Li's message of "Mon, 29 Mar 2021 18:18:42 +0800")
On Mär 29 2021, Zong Li wrote:
> Yes, I could get the network problem by using the defconfig you
> provided, the system hung up when executing 'ifconfig' immediately
> after installing macb driver module, the network can work by only
> reverting the commit 732374a0b440d9a79c8412f318a25cd37ba6f4e2. But the
> network is fine by using the mainline's defconfig, this is a little
> bit weird, I will check that and try to find the difference.
My guess would be that it is an init dependency problem between the phy
driver and the clock driver, which causes the clock to be enabled too
late.
Andreas.
--
Andreas Schwab, schwab@linux-m68k.org
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next prev parent reply other threads:[~2021-03-29 18:32 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-12-09 9:49 [PATCH v7 0/5] clk: add driver for the SiFive FU740 Zong Li
2020-12-09 9:49 ` [PATCH v7 1/5] clk: sifive: Extract prci core to common base Zong Li
2020-12-16 20:21 ` Stephen Boyd
2020-12-09 9:49 ` [PATCH v7 2/5] clk: sifive: Use common name for prci configuration Zong Li
2020-12-16 20:21 ` Stephen Boyd
2020-12-09 9:49 ` [PATCH v7 3/5] clk: sifive: Add a driver for the SiFive FU740 PRCI IP block Zong Li
2020-12-16 20:21 ` Stephen Boyd
2020-12-09 9:49 ` [PATCH v7 4/5] clk: sifive: Fix the wrong bit field shift Zong Li
2020-12-16 20:21 ` Stephen Boyd
2020-12-09 9:49 ` [PATCH v7 5/5] clk: sifive: Add clock enable and disable ops Zong Li
2020-12-16 20:21 ` Stephen Boyd
2021-03-16 19:45 ` [PATCH v7 0/5] clk: add driver for the SiFive FU740 Andreas Schwab
2021-03-18 2:07 ` Zong Li
2021-03-19 8:20 ` Zong Li
2021-03-19 8:44 ` Yixun Lan
2021-03-19 8:49 ` Andreas Schwab
2021-03-24 10:36 ` Andreas Schwab
2021-03-25 3:21 ` Zong Li
2021-03-25 9:22 ` Andreas Schwab
2021-03-26 9:10 ` Zong Li
2021-03-26 9:23 ` Andreas Schwab
2021-03-29 10:18 ` Zong Li
2021-03-29 10:37 ` Andreas Schwab [this message]
2021-03-31 8:11 ` Zong Li
2021-04-12 11:31 ` Andreas Schwab
2021-04-14 14:13 ` Zong Li
2021-05-11 8:53 ` Yixun Lan
2021-05-19 15:53 ` Zong Li
2021-05-19 18:17 ` Geert Uytterhoeven
2021-05-21 10:34 ` Zong Li
2021-05-21 12:52 ` Zong Li
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