messages from 2019-04-04 01:17:59 to 2019-04-15 15:32:00 UTC [more...]
[RFT/RFC PATCH v3 0/5] Unify CPU topology across ARM & RISC-V
2019-04-15 15:31 UTC (7+ messages)
` [RFT/RFC PATCH v3 3/5] cpu-topology: Move cpu topology code to common code
` [RFT/RFC PATCH v3 4/5] arm: Use common cpu_topology
Patch "riscv: Fix syscall_get_arguments() and syscall_set_arguments()" has been added to the 5.0-stable tree
2019-04-15 12:14 UTC
Patch "riscv: Fix syscall_get_arguments() and syscall_set_arguments()" has been added to the 4.19-stable tree
2019-04-15 12:14 UTC
[PATCH 0/3] L2 cache controller and EDAC support for SiFive SoCs
2019-04-15 11:40 UTC (4+ messages)
` [PATCH 1/3] RISC-V: Add DT documentation for SiFive L2 Cache Controller
` [PATCH 2/3] RISC-V: sifive_l2_cache: Add L2 cache controller driver for SiFive SoCs
` [PATCH 3/3] edac: sifive: Add EDAC platform "
[PATCH v2 0/3] riscv: Add perf callchain support
2019-04-15 9:52 UTC (4+ messages)
` [PATCH v2 1/3] "
` [PATCH v2 2/3] riscv: Add support for perf registers sampling
` [PATCH v2 3/3] riscv: Add support for libdw
[PATCH v3 0/3] Allow accessing CSR using CSR number
2019-04-15 9:37 UTC (4+ messages)
` [PATCH v3 1/3] RISC-V: Use tabs to align macro values in asm/csr.h
` [PATCH v3 2/3] RISC-V: Add interrupt related SCAUSE defines "
` [PATCH v3 3/3] RISC-V: Access CSRs using CSR numbers
misc cleanups v3
2019-04-15 9:14 UTC (12+ messages)
` [PATCH 01/11] riscv: use asm-generic/extable.h
` [PATCH 02/11] riscv: turn mm_segment_t into a struct
` [PATCH 03/11] riscv: remove unreachable big endian code
` [PATCH 04/11] riscv: remove CONFIG_RISCV_ISA_A
` [PATCH 05/11] riscv: clear all pending interrupts when booting
` [PATCH 06/11] riscv: simplify the stack pointer setup in head.S
` [PATCH 07/11] riscv: cleanup the parse_dtb calling conventions
` [PATCH 08/11] riscv: remove unreachable !HAVE_FUNCTION_GRAPH_RET_ADDR_PTR code
` [PATCH 09/11] riscv: remove duplicate macros from ptrace.h
` [PATCH 10/11] riscv: print the unexpected interrupt cause
` [PATCH 11/11] riscv: call pm_power_off from machine_halt / machine_power_off
[PATCH v2 0/3] Allow accessing CSR using CSR number
2019-04-15 7:29 UTC (6+ messages)
` [PATCH v2 1/3] RISC-V: Add separate asm/encoding.h for spec related defines
` [PATCH v2 2/3] RISC-V: Add interrupt related SCAUSE defines in asm/encoding.h
` [PATCH v2 3/3] RISC-V: Access CSRs using CSR numbers
[PATCH v11 0/2] PWM support for HiFive Unleashed
2019-04-15 6:06 UTC (2+ messages)
[0/3] TLB flush counters
2019-04-14 14:27 UTC (7+ messages)
` [1/3] x86: Update DEBUG_TLBFLUSH options description
` [2/3] RISC-V: Update tlb flush counters
` [3/3] RISC-V: Add DEBUG_TLBFLUSH option
[PATCH 0/3] Allow accessing CSR using CSR number
2019-04-13 8:15 UTC (10+ messages)
` [PATCH 1/3] RISC-V: Add separate asm/encoding.h for spec related defines
` [PATCH 2/3] RISC-V: Add defines for CSR numbers
` [PATCH 3/3] RISC-V: Access CSRs using "
[PATCH v5 0/2] tty: serial: add DT bindings and serial driver for the SiFive FU540 UART
2019-04-13 2:01 UTC (3+ messages)
` [PATCH v5 1/2] dt-bindings: serial: add documentation for the SiFive UART driver
` [PATCH v5 2/2] tty: serial: add driver for the SiFive UART
misc cleanups v2
2019-04-12 16:09 UTC (14+ messages)
` [PATCH 01/12] riscv: use asm-generic/extable.h
` [PATCH 02/12] riscv: turn mm_segment_t into a struct
` [PATCH 03/12] riscv: remove unreachable big endian code
` [PATCH 04/12] riscv: remove CONFIG_RISCV_ISA_A
` [PATCH 05/12] riscv: clear all pending interrupts when booting
` [PATCH 06/12] riscv: simplify the stack pointer setup in head.S
` [PATCH 07/12] riscv: cleanup the parse_dtb calling conventions
` [PATCH 08/12] riscv: remove unreachable !CONFIG_FRAME_POINTER code
` [PATCH 09/12] riscv: remove unreachable !HAVE_FUNCTION_GRAPH_RET_ADDR_PTR code
` [PATCH 10/12] riscv: remove duplicate macros from ptrace.h
` [PATCH 11/12] riscv: print the unexpected interrupt cause
` [PATCH 12/12] riscv: call pm_power_off from machine_halt / machine_power_off
[PATCH 1/6] arch: riscv: add support for building DTB files from DT source data
2019-04-12 7:37 UTC (16+ messages)
` [PATCH 2/6] dt-bindings: riscv: sifive: add YAML documentation for the SiFive FU540
` [PATCH 3/6] dt-bindings: riscv: convert cpu binding to json-schema
` [PATCH 4/6] riscv: dts: add initial support for the SiFive FU540-C000 SoC
` [PATCH 5/6] riscv: dts: add initial board data for the SiFive HiFive Unleashed
` [PATCH 6/6] riscv: defconfig: enable ARCH_SIFIVE
misc cleanups
2019-04-12 6:07 UTC (31+ messages)
` [PATCH 1/9] riscv: use asm-generic/extable.h
` [PATCH 2/9] riscv: remove dead big endian code
` [PATCH 3/9] riscv: remove CONFIG_RISCV_ISA_A
` [PATCH 4/9] riscv: turn mm_segment_t into a struct
` [PATCH 5/9] riscv: simplify stack pointer setup in head.S
` [PATCH 6/9] riscv: also clear all pending interrupts when booting
` [PATCH 7/9] riscv: remove duplicate macros from ptrace.h
` [PATCH 8/9] riscv: print the unexpected interrupt cause
` [PATCH 9/9] riscv: call pm_power_off from machine_halt / machine_power_off
[PATCH v4 0/2] tty: serial: add DT bindings and serial driver for the SiFive FU540 UART
2019-04-11 21:14 UTC (6+ messages)
` [PATCH v4 1/2] dt-bindings: serial: add documentation for the SiFive UART driver
` [PATCH v4 2/2] tty: serial: add driver for the SiFive UART
[PATCH v2 0/4] Miscellaneous kernel command line fixes
2019-04-11 18:42 UTC (10+ messages)
` [PATCH v2 1/4] RISC-V: Add RISC-V specific arch_match_cpu_phys_id
` [PATCH v2 2/4] RISC-V: Fix of_get_cpu_node usage
` [PATCH v2 3/4] RISC-V: Implement nosmp commandline option
` [PATCH v2 4/4] RISC-V: Support nr_cpus command line option
[PATCH v3 0/2] tty: serial: add DT bindings and serial driver for the SiFive FU540 UART
2019-04-11 14:45 UTC (4+ messages)
[PATCH v2 0/6] arch: riscv: add board and SoC DT file support
2019-04-11 8:42 UTC
[PATCH v3 1/3] clk: analogbits: add Wide-Range PLL library
2019-04-11 8:27 UTC (3+ messages)
` [PATCH v3 2/3] dt-bindings: clk: add documentation for the SiFive PRCI driver
` [PATCH v3 3/3] clk: sifive: add a driver for the SiFive FU540 PRCI IP block
[PATCH v3 0/3] clk: add driver for the SiFive FU540 PRCI and PLLs it controls
2019-04-11 8:26 UTC
[PATCH v2 0/5] Provide generic top-down mmap layout functions
2019-04-11 7:16 UTC (14+ messages)
` [PATCH v2 1/5] mm, fs: Move randomize_stack_top from fs to mm
` [PATCH v2 2/5] arm64, mm: Move generic mmap layout functions "
` [PATCH v2 3/5] arm: Use generic mmap top-down layout
` [PATCH v2 4/5] mips: "
` [PATCH v2 5/5] riscv: Make mmap allocation top-down by default
[PATCH v4 0/5] TLB/I$ flush cleanups and improvements
2019-04-11 1:24 UTC (6+ messages)
[PATCH 1/3] RISC-V: Add separate defconfig for 32bit systems
2019-04-10 17:13 UTC (4+ messages)
[RFC][PATCH] RISC-V: Add kexec support
2019-04-10 16:15 UTC
[PATCH 0/3] Boot RISC-V kernel from any 4KB aligned address
2019-04-10 12:45 UTC (3+ messages)
` [PATCH 3/3] RISC-V: Allow booting "
[RFC patch 06/41] riscv/stacktrace: Remove the pointless ULONG_MAX marker
2019-04-10 10:28 UTC
macb: probe of 10090000.ethernet failed with error -110
2019-04-10 9:50 UTC (3+ messages)
[PATCH 1/3] csky: Use in_syscall & forget_syscall instead of r11_sig
2019-04-10 6:53 UTC (3+ messages)
` [PATCH 3/3] riscv/signal: Fixup additional syscall restarting
[PATCH 2/3] RISC-V: Make setup_vm() independent of GCC code model
2019-04-10 4:10 UTC (3+ messages)
[PATCH v3 4/4] riscv: rewrite tlb flush for performance
2019-04-09 16:37 UTC (2+ messages)
[PATCH v2 0/2] Hugetlbfs support for riscv
2019-04-09 6:14 UTC (3+ messages)
` [PATCH v2 1/2] x86, arm64: Move ARCH_WANT_HUGE_PMD_SHARE config in arch/Kconfig
` [PATCH v2 2/2] riscv: Introduce huge page support for 32/64bit kernel
[PATCH v2] RISC-V: Implement ASID allocator
2019-04-09 3:36 UTC (3+ messages)
UNIX-Class Platform Specification Working Group
2019-04-08 6:50 UTC (4+ messages)
` [isa-dev] "
[PATCH v3] RISC-V: Fix Maximum Physical Memory 2GiB option for 64bit systems
2019-04-07 12:59 UTC (5+ messages)
[PATCH 0/7] arch: riscv: add DT file support, starting with the SiFive HiFive-U
2019-04-06 23:14 UTC (4+ messages)
` [PATCH 7/7] riscv: dts: add initial board data for the SiFive HiFive Unleashed
[PATCH] dt-bindings: clock: sifive: add FU540-C000 PRCI clock constants
2019-04-06 6:07 UTC (2+ messages)
[PATCH v8 06/20] riscv: mm: Add p?d_large() definitions
2019-04-05 4:14 UTC (2+ messages)
[GIT PULL] RISC-V Patches for 5.1-rc4
2019-04-05 1:55 UTC (2+ messages)
[PATCH 3/6 v3] riscv: Fix syscall_get_arguments() and syscall_set_arguments()
2019-04-04 23:29 UTC (13+ messages)
` [PATCH 5/6 v3] syscalls: Remove start and number from syscall_get_arguments() args
` [PATCH 6/6 v3] syscalls: Remove start and number from syscall_set_arguments() args
[PATCH 0/2] L2 Cache EDAC Support for HiFive Unleashed
2019-04-04 1:17 UTC (7+ messages)
` [PATCH 1/2] edac: sifive: Add DT documentation for SiFive L2 cache Controller
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