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a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc:content-transfer-encoding; bh=x7xlimb7+14VsRWTULroWLDoYe5MNhRf/hW9kdn4ynA=; b=CQwVXR9an16V7uCt8kPSI/TCpYlsmNOlrvAghvtZcfo36Tgw1sW0HWVM42dwJt1MEc DHcTN7CjJDdJDdZM6rYV7uCZT1yiEI3HkMlv6sY9KXAfPaJvz1DlEFgtL+j475gl7ZCw CqYRIlLGMtrXfyPKE4vIYTgequRnXqZjOuUqvJEBzjCZaIN2DSb3+VrYFPOqQHbfwIZ/ +Yd8oT0CMyz7Olmx/YIjo+y3TcFR3mxK5WTQvgO6+yscU8mp7ZKw5NnrZaUkCNRJxBJk zGrfsJVS2uig8NdtNm11kZTcEmJtfa5ecxUisyZpWAqN1B2cmlmqGiywXT6aJ78CvuhP 3ilw== X-Gm-Message-State: ANhLgQ3PPBKdjinM4hjfts0HO6eQVfhss2w/qEFn0PXe39bVkduATFzM npdwUw+o65ZbY4QAfDpyqcd2zf61i2k0RiFr2SE= X-Google-Smtp-Source: ADFU+vtyKCIJo6jtCPk9VjX6HZdynobhnyWOTXoUxsMHP2JK2WsntkNHZpaqJjCn90zenN/hTNYfzUQ7h+37RtUYO0g= X-Received: by 2002:a2e:8e6f:: with SMTP id t15mr3765603ljk.132.1583742814873; Mon, 09 Mar 2020 01:33:34 -0700 (PDT) MIME-Version: 1.0 References: In-Reply-To: From: Zong Li Date: Mon, 9 Mar 2020 16:33:23 +0800 Message-ID: Subject: Re: [PATCH v2 0/9] Support strict kernel memory permissions for security To: Zong Li Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200309_013337_099347_4A32EAF6 X-CRM114-Status: GOOD ( 12.91 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-riscv , Albert Ou , Palmer Dabbelt , Paul Walmsley Sender: "linux-riscv" Errors-To: linux-riscv-bounces+infradead-linux-riscv=archiver.kernel.org@lists.infradead.org Zong Li =E6=96=BC 2020=E5=B9=B43=E6=9C=889=E6=97=A5 = =E9=80=B1=E4=B8=80 =E4=B8=8B=E5=8D=884:22=E5=AF=AB=E9=81=93=EF=BC=9A > > The main purpose of this patch series is changing the kernel mapping perm= ission > , make sure that code is not writeable, data is not executable, and read-= only > data is neither writable nor executable. > > This patch series also supports the relevant implementations such as > ARCH_HAS_SET_MEMORY, ARCH_HAS_SET_DIRECT_MAP, > ARCH_SUPPORTS_DEBUG_PAGEALLOC and DEBUG_WX. > > Changes in v2: > - Use _data to specify the start of data section with write permission. > - Change ftrace patch text implementaion. > - Separate DEBUG_WX patch to another patchset. > > Zong Li (9): > riscv: add ARCH_HAS_SET_MEMORY support > riscv: add ARCH_HAS_SET_DIRECT_MAP support > riscv: add ARCH_SUPPORTS_DEBUG_PAGEALLOC support > riscv: move exception table immediately after RO_DATA > riscv: add alignment for text, rodata and data sections > riscv: add STRICT_KERNEL_RWX support > riscv: add macro to get instruction length > riscv: introduce interfaces to patch kernel code > riscv: patch code by fixmap mapping > > arch/riscv/Kconfig | 6 + > arch/riscv/include/asm/bug.h | 8 ++ > arch/riscv/include/asm/fixmap.h | 2 + > arch/riscv/include/asm/patch.h | 12 ++ > arch/riscv/include/asm/set_memory.h | 41 ++++++ > arch/riscv/kernel/Makefile | 4 +- > arch/riscv/kernel/ftrace.c | 13 +- > arch/riscv/kernel/patch.c | 124 ++++++++++++++++++ > arch/riscv/kernel/traps.c | 3 +- > arch/riscv/kernel/vmlinux.lds.S | 11 +- > arch/riscv/mm/Makefile | 1 + > arch/riscv/mm/init.c | 45 +++++++ > arch/riscv/mm/pageattr.c | 187 ++++++++++++++++++++++++++++ > 13 files changed, 443 insertions(+), 14 deletions(-) > create mode 100644 arch/riscv/include/asm/patch.h > create mode 100644 arch/riscv/include/asm/set_memory.h > create mode 100644 arch/riscv/kernel/patch.c > create mode 100644 arch/riscv/mm/pageattr.c > > -- > 2.25.1 > > The page table dumper support might be considered together, it is useful to check the page table entry permission. Thanks. (Refer: https://lore.kernel.org/patchwork/patch/1191018/)