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a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=5JFKFzEG0xBUwD7HIYkZnnh9dqUah7E+Ib/gYxU2vLc=; b=D+ZHpmRITN9tBQUzWr2iwkBJ/s1LH6zA+1vqzmBNpMn4I6GtjHZy68R+vrb9NcSyDM S78+m9WdqLjioccYzfJn20UpbkR/5n1SK6vGSi2CMC9v4WBVyK6TF42OJ+y4PNiBqNm1 5qqEbWDEsp24MLnCsA4nx0+wODJG0Py95vQI5nlKcI8yty6dgs9L6vm5VS0x8VrRTPYR oQUYyaEsNv8sFW5gLNp44aoHCgJpA/SyRX6jfCI5owawPC/6+Y3ziNxj2U4FjbShKgMC gHsQmY0aM7cmHEXpFGyggBQ8HOGSkJQpyQ2zk7ZUPTNe3F1ONDesrDT+q+mglqooQLJM lzuQ== X-Gm-Message-State: APjAAAWvVaN/BL+Kx8AL2t3RXiVxMOK6cD1ELSXn8FRSFpt03eTDiJ6I 9HiNZnpkxZVcsvhogbqZSSFeIOQpgGknW8qeFtwwhQ== X-Google-Smtp-Source: APXvYqzDDDWdu9fo9iPHY+ysVVykXsJWlZRil28ig+PCzrEXYHeHo4q5f7yXfu68QdSmpPfaBGotMnL52M7tvXUqMI4= X-Received: by 2002:a67:c84:: with SMTP id 126mr8581637vsm.178.1558011283233; Thu, 16 May 2019 05:54:43 -0700 (PDT) MIME-Version: 1.0 References: <1557983320-14461-1-git-send-email-sagar.kadam@sifive.com> <1557983320-14461-4-git-send-email-sagar.kadam@sifive.com> <20190516123120.GB14298@lunn.ch> In-Reply-To: <20190516123120.GB14298@lunn.ch> From: Sagar Kadam Date: Thu, 16 May 2019 18:24:32 +0530 Message-ID: Subject: Re: [PATCH v3 3/3] i2c-ocores: sifive: add polling mode workaround for FU540-C000 SoC To: Andrew Lunn X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190516_055444_540695_4334B9D7 X-CRM114-Status: GOOD ( 13.49 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: mark.rutland@arm.com, devicetree@vger.kernel.org, peter@korsgaard.com, Palmer Dabbelt , linux-kernel@vger.kernel.org, robh+dt@kernel.org, linux-i2c@vger.kernel.org, Paul Walmsley , linux-riscv@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+infradead-linux-riscv=archiver.kernel.org@lists.infradead.org Hello Andrew, On Thu, May 16, 2019 at 6:01 PM Andrew Lunn wrote: > > > @@ -682,13 +693,24 @@ static int ocores_i2c_probe(struct platform_device *pdev) > > > > irq = platform_get_irq(pdev, 0); > > if (irq == -ENXIO) { > > - i2c->flags |= OCORES_FLAG_POLL; > > + /* > > + * Set a OCORES_FLAG_BROKEN_IRQ to enable workaround for > > + * FU540-C000 SoC in polling mode interface of i2c-ocore driver. > > + * Else enable default polling mode interface for SIFIVE/OCORE > > + * device types. > > + */ > > + match = of_match_node(ocores_i2c_match, pdev->dev.of_node); > > + if (match && (long)match->data == > > + (TYPE_SIFIVE_REV0 | OCORES_FLAG_BROKEN_IRQ)) > > This looks wrong. You added: > > + { > + .compatible = "sifive,fu540-c000-i2c", > + .data = (void *)TYPE_SIFIVE_REV0, > + }, > + { > + .compatible = "sifive,i2c0", > + .data = (void *)TYPE_SIFIVE_REV0, > + }, > > So match->data just has TYPE_SIFIVE_REV0. I updated the device_id table into two logically separated patches as follows:- 1. Update device id table for Sifive devices [PATCH v3 2/3] i2c-ocore: .data for sifive,fu540-540-c000 and sifive,i2c0 both are for sifive devices hence TYPE_SIFIVE_REV0 2. Add polling mode workaround fix for fu540-c000 SoC [PATCH v3 3/3] i2c-ocores: .data for sifive,fu540-540-c000 is of TYPE_SIFIVE_REV0 and has a broken IRQ so the flag OCORES_FLAG_BROKEN_IRQ is OR'd to data into device id table. Please let me know if you feel patch 2 and patch 3 need to be squashed together into a single patch. > > > + i2c->flags |= OCORES_FLAG_BROKEN_IRQ; > > + else > > + i2c->flags |= OCORES_FLAG_POLL; > > These two don't need to be exclusive. It makes more sense to say > SIFIVE needs to poll and it its IRQ is broken. A lot of your other > changes then go away. > Other SiFive chip's with Ocore based I2C re-implementation might not need the broken IRQ workaround. and can use the the existing mainline polling mode interface, using OCORES_FLAG_POLL. Thanks & BR, Sagar Kadam > Andrew _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv