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a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=ZhAZJuqPU7RKOJhMeSxOJONoJ67G3o8MCo8xEvxcW8E=; b=sfLMosrVC+FNqHxj/7mXzyqBIcgxi8X52Dn1fll8tKMk+3syymdwDWcVlbSYBTDmlV 36aMU8K4w33AwCX4y3rO4iksNC2cPT+J3+8yVKOvLCqjWjEHGCVAtSsn10mnPOV2ZADD JKKcWL0aew0tmJcagQXzfa5BFt+qB+6FwRvFDmNp6p84z6joVn5DjblHcN4IoRgFS9KZ xAwrzABoPjKbDwiVwab/Bm+C89NPYu+ZR0dox6DW01RYVtccGujTqCbO/+CL8s6m75NM uUCHV7b8m7sxI4qqXs4M52VRrl/fEmwQ4ToJT30m7ISu2Q/rRFWY2OYaustooBkxj1Xt xpCg== X-Gm-Message-State: AJcUukeI/5YZn1M59VMENay6dQfWve00O73ZlP74/EOhTdQmm0xAIJVg NipO2dXG6P1FvlyIII9+ni3HC9zIvokzsr1Jxs+gDQ== X-Google-Smtp-Source: ALg8bN6Wfyhx4ZB6t+BJ7QeFc2BIH1aA1jxKAfnPSCTjW+ax7ahyCb0KU+/9lHBirwjCHa8GCI6vRkPGCtNpeJWqAFM= X-Received: by 2002:a1c:f509:: with SMTP id t9mr1662305wmh.76.1546948616128; Tue, 08 Jan 2019 03:56:56 -0800 (PST) MIME-Version: 1.0 References: <1546940318-9752-1-git-send-email-atish.patra@wdc.com> <1546940318-9752-7-git-send-email-atish.patra@wdc.com> In-Reply-To: <1546940318-9752-7-git-send-email-atish.patra@wdc.com> From: Anup Patel Date: Tue, 8 Jan 2019 17:26:45 +0530 Message-ID: Subject: Re: [PATCH v2 6/8] RISC-V: Add required checks during clock source init To: Atish Patra X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190108_035659_903838_B089C4F9 X-CRM114-Status: GOOD ( 15.43 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?UTF-8?Q?Patrick_St=C3=A4hlin?= , Albert Ou , Jason Cooper , Alan Kao , Dmitriy Cherkasov , Andreas Schwab , Daniel Lezcano , "linux-kernel@vger.kernel.org List" , Michael Clark , Marc Zyngier , Palmer Dabbelt , linux-riscv@lists.infradead.org, Thomas Gleixner , Zong Li Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+infradead-linux-riscv=archiver.kernel.org@lists.infradead.org Few nit changes.. Prefer, "clocksource/drivers/riscv:" prefix instead of "RISC-V:" for this patch. On Tue, Jan 8, 2019 at 3:08 PM Atish Patra wrote: > > Currently, clocksource registration happens for an invalid cpu > for non-smp kernels. This lead to kernel panic as cpu hotplug > registration will fail for those cpus. Moreover, > riscv_hartid_to_cpuid can return errors now. > > Do not proceed if hartid or cpuid is invalid. Take this opprtunity > to print appropriate error strings for different failure cases. > > Signed-off-by: Atish Patra > --- > drivers/clocksource/timer-riscv.c | 23 ++++++++++++++++++++--- > 1 file changed, 20 insertions(+), 3 deletions(-) > > diff --git a/drivers/clocksource/timer-riscv.c b/drivers/clocksource/timer-riscv.c > index 43189220..d9b914e9 100644 > --- a/drivers/clocksource/timer-riscv.c > +++ b/drivers/clocksource/timer-riscv.c > @@ -95,14 +95,31 @@ static int __init riscv_timer_init_dt(struct device_node *n) > struct clocksource *cs; > > hartid = riscv_of_processor_hartid(n); > + if (hartid < 0) { > + pr_warn("Not valid hartid for node [%pOF] error = [%d]\n", > + n, hartid); > + return hartid; > + } Add empty line here. > cpuid = riscv_hartid_to_cpuid(hartid); > Remove empty line here > + if (cpuid < 0) { > + pr_warn("Invalid cpuid for hartid [%d]\n", hartid); > + return cpuid; > + } > + > if (cpuid != smp_processor_id()) > return 0; > > + pr_err("%s: Registering clocksource cpuid [%d] hartid [%d]\n", > + __func__, cpuid, hartid); > cs = per_cpu_ptr(&riscv_clocksource, cpuid); > - clocksource_register_hz(cs, riscv_timebase); > + error = clocksource_register_hz(cs, riscv_timebase); > Remove empty line here. > + if (error) { > + pr_err("RISCV timer register failed [%d] for cpu = [%d]\n", > + error, cpuid); > + return error; > + } Add empty line here. > sched_clock_register(riscv_sched_clock, > BITS_PER_LONG, riscv_timebase); > > @@ -110,8 +127,8 @@ static int __init riscv_timer_init_dt(struct device_node *n) > "clockevents/riscv/timer:starting", > riscv_timer_starting_cpu, riscv_timer_dying_cpu); > if (error) > - pr_err("RISCV timer register failed [%d] for cpu = [%d]\n", > - error, cpuid); > + pr_err("cpu hp setup state failed for RISCV timer [%d]\n", > + error); > return error; > } > > -- > 2.7.4 > Apart from above, looks good to me. Reviewed-by: Anup Patel Regards, Anup _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv