From: Anup Patel <anup@brainfault.org>
To: Guo Ren <guoren@kernel.org>
Cc: linux-arch@vger.kernel.org, Albert Ou <aou@eecs.berkeley.edu>,
Guo Ren <ren_guo@c-sky.com>, Arnd Bergmann <arnd@arndb.de>,
Atish Patra <atish.patra@wdc.com>,
Andreas Schwab <schwab@linux-m68k.org>,
Anup Patel <Anup.Patel@wdc.com>,
"linux-kernel@vger.kernel.org List"
<linux-kernel@vger.kernel.org>,
linux-csky@vger.kernel.org,
Vincent Chen <vincent.chen@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>, Zong Li <zong.li@sifive.com>,
Paul Walmsley <paul.walmsley@sifive.com>,
Greentime Hu <greentime.hu@sifive.com>,
linux-riscv <linux-riscv@lists.infradead.org>,
Bin Meng <bmeng.cn@gmail.com>
Subject: Re: [PATCH V2 1/4] riscv: Separate patch for cflags and aflags
Date: Thu, 23 Jan 2020 11:14:20 +0530 [thread overview]
Message-ID: <CAAhSdy0k2gb1+k214dW1Zk-YwvujNdui5GJE3zPb_NhDS9b_Rw@mail.gmail.com> (raw)
In-Reply-To: <20200116143029.31441-1-guoren@kernel.org>
On Thu, Jan 16, 2020 at 8:01 PM <guoren@kernel.org> wrote:
>
> From: Guo Ren <ren_guo@c-sky.com>
>
> Use "subst fd" in Makefile is a hack way and it's not convenient
> to add new ISA feature. Just separate them into riscv-march-cflags
> and riscv-march-aflags.
>
> Signed-off-by: Guo Ren <ren_guo@c-sky.com>
> Cc: Anup Patel <Anup.Patel@wdc.com>
> ---
> arch/riscv/Makefile | 18 ++++++++++++------
> 1 file changed, 12 insertions(+), 6 deletions(-)
>
> diff --git a/arch/riscv/Makefile b/arch/riscv/Makefile
> index b9009a2fbaf5..6d09b53cf106 100644
> --- a/arch/riscv/Makefile
> +++ b/arch/riscv/Makefile
> @@ -35,12 +35,18 @@ else
> endif
>
> # ISA string setting
> -riscv-march-$(CONFIG_ARCH_RV32I) := rv32ima
> -riscv-march-$(CONFIG_ARCH_RV64I) := rv64ima
> -riscv-march-$(CONFIG_FPU) := $(riscv-march-y)fd
> -riscv-march-$(CONFIG_RISCV_ISA_C) := $(riscv-march-y)c
> -KBUILD_CFLAGS += -march=$(subst fd,,$(riscv-march-y))
> -KBUILD_AFLAGS += -march=$(riscv-march-y)
> +riscv-march-cflags-$(CONFIG_ARCH_RV32I) := rv32ima
> +riscv-march-cflags-$(CONFIG_ARCH_RV64I) := rv64ima
> +riscv-march-$(CONFIG_FPU) := $(riscv-march-y)fd
> +riscv-march-cflags-$(CONFIG_RISCV_ISA_C) := $(riscv-march-cflags-y)c
> +
> +riscv-march-aflags-$(CONFIG_ARCH_RV32I) := rv32ima
> +riscv-march-aflags-$(CONFIG_ARCH_RV64I) := rv64ima
> +riscv-march-aflags-$(CONFIG_FPU) := $(riscv-march-aflags-y)fd
> +riscv-march-aflags-$(CONFIG_RISCV_ISA_C) := $(riscv-march-aflags-y)c
> +
> +KBUILD_CFLAGS += -march=$(riscv-march-cflags-y)
> +KBUILD_AFLAGS += -march=$(riscv-march-aflags-y)
>
> KBUILD_CFLAGS += -mno-save-restore
> KBUILD_CFLAGS += -DCONFIG_PAGE_OFFSET=$(CONFIG_PAGE_OFFSET)
> --
> 2.17.0
>
LGTM.
Reviewed-by: Anup Patel <anup@brainfault.org>
Regards,
Anup
prev parent reply other threads:[~2020-01-23 5:44 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-01-16 14:30 [PATCH V2 1/4] riscv: Separate patch for cflags and aflags guoren
2020-01-16 14:30 ` [PATCH V2 2/4] riscv: Rename __switch_to_aux -> fpu guoren
2020-01-23 5:44 ` Anup Patel
2020-01-16 14:30 ` [PATCH V2 3/4] riscv: Extending cpufeature.c to detect V-extension guoren
2020-01-23 5:45 ` Anup Patel
2020-01-16 14:30 ` [PATCH V2 4/4] riscv: Add vector ISA support guoren
2020-01-23 6:04 ` Anup Patel
2020-01-23 5:44 ` Anup Patel [this message]
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