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charset="UTF-8" X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200211_205347_007059_D091F931 X-CRM114-Status: GOOD ( 18.66 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Albert Ou , Jason Cooper , Marc Zyngier , Daniel Lezcano , Heiko Carstens , "linux-kernel@vger.kernel.org List" , Mike Rapoport , Vincent Chen , Mao Han , Geert Uytterhoeven , "Eric W. Biederman" , Paul Walmsley , Michael Ellerman , Marek Szyprowski , Palmer Dabbelt , linux-riscv , Borislav Petkov , Thomas Gleixner , Allison Randal , Kees Cook Sender: "linux-riscv" Errors-To: linux-riscv-bounces+infradead-linux-riscv=archiver.kernel.org@lists.infradead.org On Wed, Feb 12, 2020 at 7:22 AM Atish Patra wrote: > > SBI specification defines HSM extension that allows to start/stop a hart > by a supervisor anytime. The specification is available at > > https://github.com/riscv/riscv-sbi-doc/blob/master/riscv-sbi.adoc > > Implement SBI HSM extension. I think this PATCH needs to be further broken down. There are three distinct changes here: 1. Exporting sbi_err_map_linux_errno() function arch/riscv/kernel/sbi.c arch/riscv/include/asm/sbi.h 2. SBI HSM defines arch/riscv/include/asm/sbi.h 3. SBI HSM helper functions (which are mostly static functions) arch/riscv/kernel/Makefile arch/riscv/kernel/cpu_ops_sbi.c We need separate patches for point1 and point2 above. Also, point3 can be part of current PATCH9. Regards, Anup > > Signed-off-by: Atish Patra > --- > arch/riscv/include/asm/sbi.h | 15 +++++++++++ > arch/riscv/kernel/Makefile | 3 +++ > arch/riscv/kernel/cpu_ops_sbi.c | 48 +++++++++++++++++++++++++++++++++ > arch/riscv/kernel/sbi.c | 3 ++- > 4 files changed, 68 insertions(+), 1 deletion(-) > create mode 100644 arch/riscv/kernel/cpu_ops_sbi.c > > diff --git a/arch/riscv/include/asm/sbi.h b/arch/riscv/include/asm/sbi.h > index d55d8090ab5c..0981a0c97eda 100644 > --- a/arch/riscv/include/asm/sbi.h > +++ b/arch/riscv/include/asm/sbi.h > @@ -26,6 +26,7 @@ enum sbi_ext_id { > SBI_EXT_TIME = 0x54494D45, > SBI_EXT_IPI = 0x735049, > SBI_EXT_RFENCE = 0x52464E43, > + SBI_EXT_HSM = 0x48534D, > }; > > enum sbi_ext_base_fid { > @@ -56,6 +57,19 @@ enum sbi_ext_rfence_fid { > SBI_EXT_RFENCE_REMOTE_HFENCE_VVMA_ASID, > }; > > +enum sbi_ext_hsm_fid { > + SBI_EXT_HSM_HART_START = 0, > + SBI_EXT_HSM_HART_STOP, > + SBI_EXT_HSM_HART_STATUS, > +}; > + > +enum sbi_hsm_hart_status { > + SBI_HSM_HART_STATUS_AVAILABLE = 0, > + SBI_HSM_HART_STATUS_NOT_AVAILABLE, > + SBI_HSM_HART_STATUS_START_PENDING, > + SBI_HSM_HART_STATUS_STOP_PENDING, > +}; > + > #define SBI_SPEC_VERSION_DEFAULT 0x1 > #define SBI_SPEC_VERSION_MAJOR_SHIFT 24 > #define SBI_SPEC_VERSION_MAJOR_MASK 0x7f > @@ -130,6 +144,7 @@ static inline unsigned long sbi_minor_version(void) > { > return sbi_spec_version & SBI_SPEC_VERSION_MINOR_MASK; > } > +int sbi_err_map_linux_errno(int err); > #else /* CONFIG_RISCV_SBI */ > /* stubs for code that is only reachable under IS_ENABLED(CONFIG_RISCV_SBI): */ > void sbi_set_timer(uint64_t stime_value); > diff --git a/arch/riscv/kernel/Makefile b/arch/riscv/kernel/Makefile > index f81a6ff88005..a0be34b96846 100644 > --- a/arch/riscv/kernel/Makefile > +++ b/arch/riscv/kernel/Makefile > @@ -44,5 +44,8 @@ obj-$(CONFIG_PERF_EVENTS) += perf_event.o > obj-$(CONFIG_PERF_EVENTS) += perf_callchain.o > obj-$(CONFIG_HAVE_PERF_REGS) += perf_regs.o > obj-$(CONFIG_RISCV_SBI) += sbi.o > +ifeq ($(CONFIG_RISCV_SBI), y) > +obj-$(CONFIG_SMP) += cpu_ops_sbi.o > +endif > > clean: > diff --git a/arch/riscv/kernel/cpu_ops_sbi.c b/arch/riscv/kernel/cpu_ops_sbi.c > new file mode 100644 > index 000000000000..9bdb60e0a4df > --- /dev/null > +++ b/arch/riscv/kernel/cpu_ops_sbi.c > @@ -0,0 +1,48 @@ > +// SPDX-License-Identifier: GPL-2.0-only > +/* > + * HSM extension and cpu_ops implementation. > + * > + * Copyright (c) 2020 Western Digital Corporation or its affiliates. > + */ > + > +#include > +#include > +#include > +#include > + > +static int sbi_hsm_hart_stop(void) > +{ > + struct sbiret ret; > + > + ret = sbi_ecall(SBI_EXT_HSM, SBI_EXT_HSM_HART_STOP, 0, 0, 0, 0, 0, 0); > + > + if (ret.error) > + return sbi_err_map_linux_errno(ret.error); > + else > + return 0; > +} > + > +static int sbi_hsm_hart_start(unsigned long hartid, unsigned long saddr, > + unsigned long priv) > +{ > + struct sbiret ret; > + > + ret = sbi_ecall(SBI_EXT_HSM, SBI_EXT_HSM_HART_START, > + hartid, saddr, priv, 0, 0, 0); > + if (ret.error) > + return sbi_err_map_linux_errno(ret.error); > + else > + return 0; > +} > + > +static int sbi_hsm_hart_get_status(unsigned long hartid) > +{ > + struct sbiret ret; > + > + ret = sbi_ecall(SBI_EXT_HSM, SBI_EXT_HSM_HART_STATUS, > + hartid, 0, 0, 0, 0, 0); > + if (ret.error) > + return sbi_err_map_linux_errno(ret.error); > + else > + return ret.value; > +} > diff --git a/arch/riscv/kernel/sbi.c b/arch/riscv/kernel/sbi.c > index cd0f68aeac70..45ad49269f2c 100644 > --- a/arch/riscv/kernel/sbi.c > +++ b/arch/riscv/kernel/sbi.c > @@ -47,7 +47,7 @@ struct sbiret sbi_ecall(int ext, int fid, unsigned long arg0, > } > EXPORT_SYMBOL(sbi_ecall); > > -static int sbi_err_map_linux_errno(int err) > +int sbi_err_map_linux_errno(int err) > { > switch (err) { > case SBI_SUCCESS: > @@ -64,6 +64,7 @@ static int sbi_err_map_linux_errno(int err) > return -ENOTSUPP; > }; > } > +EXPORT_SYMBOL(sbi_err_map_linux_errno); > > #ifdef CONFIG_RISCV_SBI_V01 > /** > -- > 2.24.0 >