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a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=FDkPt2vxGvwt3QPswZka6NmewYvhNdxaRnBgmjWNMNE=; b=XPzVNbLwGegEf/MWApzPwsXcKoSXakwjVySvWEG2nxqQT9IfKqqZ9h9tBYbWZSZCoO 6av6dnfkLmK2YLT1+GqOSKSytP7NS8nr8OPMVVTsFJJAPUjRh6T8lw0A6+s2FeQfpl27 gHv3dDutSzwMsr5E8Spj8bllKb8RiiskM7j77FWg/7Yq5IkR7S0LDvBMjhUUDCxNHNak 73dQUlCwld7KN+TN+3SoDMdC5DlGXagh8wJFqqFdnYhBCgQpaq9aYZRdr9UAqrGjlflu H+PVcV7MeQtBT+qiEVnoFb/BGjwJFSv5+z/aWHbgbK6Gk7px3b0IeejOeslR7jv+80/X VLQQ== X-Gm-Message-State: APjAAAUeCfY9zyAWTqvU9Lm4ImJ+nvmYYSqzJkeggPnex/CIAGGB4tMy PW96GJrEj4xvihaSuYAQy6IWpSIFw/EWLGuqELjFYA== X-Google-Smtp-Source: APXvYqzGZAwZcrHBPmOgmCPHvyvMfVI74sgWBPVAhX27aA6UWJHfjZjS6tcIVVoOKyt4lXWyW/tRQWr+XDi0GMbCxqI= X-Received: by 2002:a05:6000:351:: with SMTP id e17mr5324719wre.96.1572060147773; Fri, 25 Oct 2019 20:22:27 -0700 (PDT) MIME-Version: 1.0 References: <20191016160649.24622-1-anup.patel@wdc.com> In-Reply-To: From: Anup Patel Date: Sat, 26 Oct 2019 08:52:16 +0530 Message-ID: Subject: Re: [PATCH v9 00/22] KVM RISC-V Support To: Paul Walmsley X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20191025_202231_428924_C126EA31 X-CRM114-Status: GOOD ( 10.22 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Alistair Francis , Palmer Dabbelt , Daniel Lezcano , "kvm@vger.kernel.org" , Radim K , Anup Patel , Damien Le Moal , "linux-kernel@vger.kernel.org" , Christoph Hellwig , Atish Patra , Alexander Graf , Paolo Bonzini , Thomas Gleixner , "linux-riscv@lists.infradead.org" Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+infradead-linux-riscv=archiver.kernel.org@lists.infradead.org On Sat, Oct 26, 2019 at 4:40 AM Paul Walmsley wrote: > > Hi Anup, > > On Wed, 16 Oct 2019, Anup Patel wrote: > > > This series adds initial KVM RISC-V support. Currently, we are able to boot > > RISC-V 64bit Linux Guests with multiple VCPUs. > > > > Few key aspects of KVM RISC-V added by this series are: > > 1. Minimal possible KVM world-switch which touches only GPRs and few CSRs. > > 2. Full Guest/VM switch is done via vcpu_get/vcpu_put infrastructure. > > 3. KVM ONE_REG interface for VCPU register access from user-space. > > 4. PLIC emulation is done in user-space. > > 5. Timer and IPI emuation is done in-kernel. > > 6. MMU notifiers supported. > > 7. FP lazy save/restore supported. > > 8. SBI v0.1 emulation for KVM Guest available. > > 9. Forward unhandled SBI calls to KVM userspace. > > 10. Hugepage support for Guest/VM > > Several patches in this series cause 'checkpatch.pl --strict' to flag > issues. When you respin this series, could you fix those, please? I generally run checkpatch.pl every time before sending patches. I will try checkpatch.pl with --strict parameter as well in v10 series. Regards, Anup > > > thanks, > > - Paul _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv