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a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=BMoq4qWh/WrIZpuJeJZ6gjv2TsstGKsOQOalG0lD0NU=; b=A9vjYKRwTqCfaCaxvEg7Gv9vz+MyWAw8Ya8Cyms3W4JrTSVX6SOOJ5cyL4N3hHwupv TgrTqavy3rTz9y+5mSFaruZoM+qDRXm1MzBZhdy0lqu7ZTZteSBdRy21NkenbY0++2Aw SVafsa6dzbT27CSLAUWHsCVyECbu5ynuVEO0WcRMzxvXta57NEec+67kQx28LJXIZYKP aJ0E+F95rd65DDmHVLSrLBwzEGgM6E9DQ2gOju12XOu1stBbHUrK/4NYPJDGiesD/X5r tgic44pzuzr5FM6xKWMZmfzPtLYs5DyLjgGR+0UeVRTiZO5fjKHpKCHDn1t5b5b4WgvF zZdQ== X-Gm-Message-State: APjAAAVulfyXUKE4PrO+gxHd3qFZkII4oWI19ODR+nMq6ixXdTiR3aCb h0QXWG+VbYjYl1PKAAE7ODPIsEmkCC9ri6mf6e44Bw== X-Google-Smtp-Source: APXvYqzn8yAbbsm5PAMd9u3DQu/7uYZTipbyo4jF/J90tRTmlAyT6TlEoHenuT1lWEI3s4nunuRECnqh8rGIY1T9BOM= X-Received: by 2002:a1c:544f:: with SMTP id p15mr13814879wmi.65.1554641951971; Sun, 07 Apr 2019 05:59:11 -0700 (PDT) MIME-Version: 1.0 References: In-Reply-To: From: Anup Patel Date: Sun, 7 Apr 2019 18:29:00 +0530 Message-ID: Subject: Re: [PATCH v3] RISC-V: Fix Maximum Physical Memory 2GiB option for 64bit systems To: Palmer Dabbelt X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190407_055914_940226_D91209B3 X-CRM114-Status: GOOD ( 24.41 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Albert Ou , Anup Patel , "linux-kernel@vger.kernel.org List" , Mike Rapoport , Christoph Hellwig , Atish Patra , Paul Walmsley , linux-riscv@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+infradead-linux-riscv=archiver.kernel.org@lists.infradead.org On Sat, Apr 6, 2019 at 2:47 AM Palmer Dabbelt wrote: > > On Thu, 04 Apr 2019 23:01:11 PDT (-0700), anup@brainfault.org wrote: > > On Fri, Apr 5, 2019 at 11:24 AM Christoph Hellwig wrote: > >> > >> On Fri, Apr 05, 2019 at 05:49:34AM +0000, Anup Patel wrote: > >> > The Maximum Physical Memory 2GiB option for 64bit systems is currently > >> > broken because kernel hangs at boot-time when this option is enabled > >> > and the underlying system has more than 2GiB memory. > >> > > >> > This issue can be easily reproduced on SiFive Unleashed board where > >> > we have 8GiB of memory. > >> > > >> > This patch fixes above issue by removing unusable memory region in > >> > setup_bootmem(). > >> > > >> > Signed-off-by: Anup Patel > >> > Reviewed-by: Christoph Hellwig > >> > >> Btw, what is the rationale behind even offering the 2GiB option and > >> the medlow model on 64-bit? Do we reall have use cases where the > >> slightly more effient generated code matters so much to keep up > >> the support burden of this mostly unused and unusual configuration? > > I'd be OK dropping medlow on rv64. The performance impact of medany is pretty minor > these days, and even back when we added the option it was mostly paranoia about > the linker being correct. medany has been solid on rv64 for a while, but we > did recently find a pretty major toolchain bug in medany/rv32 so if we were to > drop that we'd need to enforce a pretty recent binutils version (the latest > release is OK, I'd have to check on the previous one). I'd prefer to avoid > that, and since medany doesn't really buy us anything on rv32 it seems fine to > leave it that way. > > Given how many issues we've found here recently I doubt anyone is flipping this > option away from the default for their base ISA. Actually, this issue was reported by someone trying out Maximum Physical Memory 2GiB option. I agree that "Maximum Physical Memory 2GiB option" is not that useful and does not provide much gain over cmodel medany but I would suggest that we take this patch as a RC fix and remove "Maximum Physical Memory 2GiB option" as separate patch because: 1. This option has been part of few kernel releases. Even if don't recommend someone might flip it and report an issue. 2. This fix also takes care of the situation where we are using "Maximum Physical Memory 128GiB" option (default) and underlying host has more than 128 GiB memory (assuming a server-class RISC-V system). > > > Yes, if we want to use medlow with 64bit then max physical memory > > can be 2GiB. Otherwise, I don't any practical use of restricting max > > physical memory to 2GiB on 64bit systems. > > > > BTW, as-per latest revision of RISC-V priviledge spece the MMU SV32 > > mode will be able to access 34bit physical memory (i.e. 16GiB) so > > max physical memory 2GiB will also be required for 32bit system for > > medlow. > > It's a bit more complicated that than. The 34-bit physical addresses have been > in the spec for a long time, but we've never bothered supporting them in Linux. > Right now we assume we can map all physical memory into a contiguous region, > which is why we tie PAGE_OFFSET to the maximum physical memory. It's > impossible to map all physical memory with 34-bit physical addresses on a > 32-bit system, so we'll need to break that assumption to move forward with > 34-bit physical addresses anyway. > > Additionally: medlow can map everything on 32-bit systems anyway, so moving to > medany doesn't buy you anything. Currently, QEMU emulates the legacy SV32 with 32-bit physical address so first QEMU has to be updated. Further, I think we will need a kconfig option for new SV32 with 34bit physical address to support existing RV32 hardware which implements SV32 with 32bit physical address. Regards, Anup _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv