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a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=IAdaq4HTHtn9UgygwSdqo6FWXUDWbOVhcJ/s4RYHz+I=; b=CxKlBF+UVXm4C6EqBEhme8nu2H8/wKWXh57St5zCtwgLKUKZ/0tMPOGfMtJcrmnvi2 JvvjdIXJMDYy5G2KsCYa0FD+jjBJppx4e3iZUb9tfemnwzYqiDKQe/KNovmDGa8H5KRH e9+opwDtOFECw2XDcvvqcx1arERS9MpRpFuBD//EvV1PfzN7S5R2HHVxTdSl+8meYDPc Pfka38e4qfzB+UnN6T4AkrZleVDYIq2slJbFTWpR8PTmBuXCwNihpSokFycznLy0mCpv 1c97eac+TuR2+km4R8ykB8q4cTfQntG0jNfv2wWi/fz8bnkOh81S3clmg6xMMQeZ8Wyl GZog== X-Gm-Message-State: APjAAAWMgVEJ9RLDLbSWYPjh1JDLNdWB4c+G0cfI4LnjOkcJWHFV4zQY r6jqbhrOQ51NHJZ2lFpixdTj3+3W7FjbFqKCfJzN+g== X-Google-Smtp-Source: APXvYqz+JMk4RFaQtiNFIeVm0nYA2ZcUqDgRh1gC1tS1iqcqNn+kxAfNXaz8nxbt0z6dtf8yF1WsCfJ4b5MX8ptmGsM= X-Received: by 2002:a05:6000:104:: with SMTP id o4mr4620484wrx.309.1574741479689; Mon, 25 Nov 2019 20:11:19 -0800 (PST) MIME-Version: 1.0 References: <20191126032033.14825-1-atish.patra@wdc.com> <20191126032033.14825-3-atish.patra@wdc.com> In-Reply-To: <20191126032033.14825-3-atish.patra@wdc.com> From: Anup Patel Date: Tue, 26 Nov 2019 09:41:08 +0530 Message-ID: Subject: Re: [PATCH v4 2/4] RISC-V: Add basic support for SBI v0.2 To: Atish Patra X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20191125_201126_289453_2B1415AF X-CRM114-Status: GOOD ( 20.89 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Albert Ou , "linux-kernel@vger.kernel.org List" , Mike Rapoport , Palmer Dabbelt , Paul Walmsley , linux-riscv , Thomas Gleixner , Mao Han Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+infradead-linux-riscv=archiver.kernel.org@lists.infradead.org On Tue, Nov 26, 2019 at 8:50 AM Atish Patra wrote: > > The SBI v0.2 introduces a base extension which is backward compatible > with v0.1. Implement all helper functions and minimum required SBI > calls from v0.2 for now. All other base extension function will be > added later as per need. > As v0.2 calling convention is backward compatible with v0.1, remove > the v0.1 helper functions and just use v0.2 calling convention. > > Signed-off-by: Atish Patra > --- > arch/riscv/include/asm/sbi.h | 139 ++++++++++---------- > arch/riscv/kernel/Makefile | 1 + > arch/riscv/kernel/sbi.c | 248 ++++++++++++++++++++++++++++++++++- > arch/riscv/kernel/setup.c | 2 + > 4 files changed, 316 insertions(+), 74 deletions(-) > > diff --git a/arch/riscv/include/asm/sbi.h b/arch/riscv/include/asm/sbi.h > index 96aaee270ded..906438322932 100644 > --- a/arch/riscv/include/asm/sbi.h > +++ b/arch/riscv/include/asm/sbi.h > @@ -9,93 +9,88 @@ > #include > > #ifdef CONFIG_RISCV_SBI > -#define SBI_EXT_0_1_SET_TIMER 0x0 > -#define SBI_EXT_0_1_CONSOLE_PUTCHAR 0x1 > -#define SBI_EXT_0_1_CONSOLE_GETCHAR 0x2 > -#define SBI_EXT_0_1_CLEAR_IPI 0x3 > -#define SBI_EXT_0_1_SEND_IPI 0x4 > -#define SBI_EXT_0_1_REMOTE_FENCE_I 0x5 > -#define SBI_EXT_0_1_REMOTE_SFENCE_VMA 0x6 > -#define SBI_EXT_0_1_REMOTE_SFENCE_VMA_ASID 0x7 > -#define SBI_EXT_0_1_SHUTDOWN 0x8 > +enum sbi_ext_id { > + SBI_EXT_0_1_SET_TIMER = 0x0, > + SBI_EXT_0_1_CONSOLE_PUTCHAR = 0x1, > + SBI_EXT_0_1_CONSOLE_GETCHAR = 0x2, > + SBI_EXT_0_1_CLEAR_IPI = 0x3, > + SBI_EXT_0_1_SEND_IPI = 0x4, > + SBI_EXT_0_1_REMOTE_FENCE_I = 0x5, > + SBI_EXT_0_1_REMOTE_SFENCE_VMA = 0x6, > + SBI_EXT_0_1_REMOTE_SFENCE_VMA_ASID = 0x7, > + SBI_EXT_0_1_SHUTDOWN = 0x8, > + SBI_EXT_BASE = 0x10, > +}; > > -#define SBI_CALL(which, arg0, arg1, arg2, arg3) ({ \ > - register uintptr_t a0 asm ("a0") = (uintptr_t)(arg0); \ > - register uintptr_t a1 asm ("a1") = (uintptr_t)(arg1); \ > - register uintptr_t a2 asm ("a2") = (uintptr_t)(arg2); \ > - register uintptr_t a3 asm ("a3") = (uintptr_t)(arg3); \ > - register uintptr_t a7 asm ("a7") = (uintptr_t)(which); \ > - asm volatile ("ecall" \ > - : "+r" (a0) \ > - : "r" (a1), "r" (a2), "r" (a3), "r" (a7) \ > - : "memory"); \ > - a0; \ > -}) > +enum sbi_ext_base_fid { > + SBI_BASE_GET_SPEC_VERSION = 0, > + SBI_BASE_GET_IMP_ID, > + SBI_BASE_GET_IMP_VERSION, > + SBI_BASE_PROBE_EXT, > + SBI_BASE_GET_MVENDORID, > + SBI_BASE_GET_MARCHID, > + SBI_BASE_GET_MIMPID, > +}; > > -/* Lazy implementations until SBI is finalized */ > -#define SBI_CALL_0(which) SBI_CALL(which, 0, 0, 0, 0) > -#define SBI_CALL_1(which, arg0) SBI_CALL(which, arg0, 0, 0, 0) > -#define SBI_CALL_2(which, arg0, arg1) SBI_CALL(which, arg0, arg1, 0, 0) > -#define SBI_CALL_3(which, arg0, arg1, arg2) \ > - SBI_CALL(which, arg0, arg1, arg2, 0) > -#define SBI_CALL_4(which, arg0, arg1, arg2, arg3) \ > - SBI_CALL(which, arg0, arg1, arg2, arg3) > +#define SBI_SPEC_VERSION_DEFAULT 0x1 > +#define SBI_SPEC_VERSION_MAJOR_OFFSET 24 > +#define SBI_SPEC_VERSION_MAJOR_MASK 0x7f > +#define SBI_SPEC_VERSION_MINOR_MASK 0xffffff > > -static inline void sbi_console_putchar(int ch) > -{ > - SBI_CALL_1(SBI_EXT_0_1_CONSOLE_PUTCHAR, ch); > -} > +/* SBI return error codes */ > +#define SBI_SUCCESS 0 > +#define SBI_ERR_FAILURE -1 > +#define SBI_ERR_NOT_SUPPORTED -2 > +#define SBI_ERR_INVALID_PARAM -3 > +#define SBI_ERR_DENIED -4 > +#define SBI_ERR_INVALID_ADDRESS -5 > > -static inline int sbi_console_getchar(void) > -{ > - return SBI_CALL_0(SBI_EXT_0_1_CONSOLE_GETCHAR); > -} > +extern unsigned long sbi_spec_version; > +struct sbiret { > + long error; > + long value; > +}; > > -static inline void sbi_set_timer(uint64_t stime_value) > -{ > -#if __riscv_xlen == 32 > - SBI_CALL_2(SBI_EXT_0_1_SET_TIMER, stime_value, > - stime_value >> 32); > -#else > - SBI_CALL_1(SBI_EXT_0_1_SET_TIMER, stime_value); > -#endif > -} > - > -static inline void sbi_shutdown(void) > -{ > - SBI_CALL_0(SBI_EXT_0_1_SHUTDOWN); > -} > +int sbi_init(void); > +struct sbiret sbi_ecall(int ext, int fid, unsigned long arg0, > + unsigned long arg1, unsigned long arg2, > + unsigned long arg3, unsigned long arg4, > + unsigned long arg5); > > -static inline void sbi_clear_ipi(void) > -{ > - SBI_CALL_0(SBI_EXT_0_1_CLEAR_IPI); > -} > +void sbi_console_putchar(int ch); > +int sbi_console_getchar(void); > +void sbi_set_timer(uint64_t stime_value); > +void sbi_shutdown(void); > +void sbi_clear_ipi(void); > +void sbi_send_ipi(const unsigned long *hart_mask); > +void sbi_remote_fence_i(const unsigned long *hart_mask); > +void sbi_remote_sfence_vma(const unsigned long *hart_mask, > + unsigned long start, > + unsigned long size); > > -static inline void sbi_send_ipi(const unsigned long *hart_mask) > -{ > - SBI_CALL_1(SBI_EXT_0_1_SEND_IPI, hart_mask); > -} > +void sbi_remote_sfence_vma_asid(const unsigned long *hart_mask, > + unsigned long start, > + unsigned long size, > + unsigned long asid); > +int sbi_probe_extension(long ext); > > -static inline void sbi_remote_fence_i(const unsigned long *hart_mask) > +/* Check if current SBI specification version is 0.1 or not */ > +static inline int sbi_spec_is_0_1(void) > { > - SBI_CALL_1(SBI_EXT_0_1_REMOTE_FENCE_I, hart_mask); > + return (sbi_spec_version == SBI_SPEC_VERSION_DEFAULT) ? 1 : 0; > } > > -static inline void sbi_remote_sfence_vma(const unsigned long *hart_mask, > - unsigned long start, > - unsigned long size) > +/* Get the major version of SBI */ > +static inline unsigned long sbi_major_version(void) > { > - SBI_CALL_3(SBI_EXT_0_1_REMOTE_SFENCE_VMA, hart_mask, > - start, size); > + return (sbi_spec_version >> SBI_SPEC_VERSION_MAJOR_OFFSET) & > + SBI_SPEC_VERSION_MAJOR_MASK; > } > > -static inline void sbi_remote_sfence_vma_asid(const unsigned long *hart_mask, > - unsigned long start, > - unsigned long size, > - unsigned long asid) > +/* Get the minor version of SBI */ > +static inline unsigned long sbi_minor_version(void) > { > - SBI_CALL_4(SBI_EXT_0_1_REMOTE_SFENCE_VMA_ASID, hart_mask, > - start, size, asid); > + return sbi_spec_version & SBI_SPEC_VERSION_MINOR_MASK; > } > #else /* CONFIG_RISCV_SBI */ > /* stubs for code that is only reachable under IS_ENABLED(CONFIG_RISCV_SBI): */ > diff --git a/arch/riscv/kernel/Makefile b/arch/riscv/kernel/Makefile > index f40205cb9a22..56127dd359f1 100644 > --- a/arch/riscv/kernel/Makefile > +++ b/arch/riscv/kernel/Makefile > @@ -17,6 +17,7 @@ obj-y += irq.o > obj-y += process.o > obj-y += ptrace.o > obj-y += reset.o > +obj-y += sbi.o > obj-y += setup.o > obj-y += signal.o > obj-y += syscall_table.o > diff --git a/arch/riscv/kernel/sbi.c b/arch/riscv/kernel/sbi.c > index f6c7c3e82d28..8b36269fa515 100644 > --- a/arch/riscv/kernel/sbi.c > +++ b/arch/riscv/kernel/sbi.c > @@ -4,14 +4,258 @@ > #include > #include > > +/* default SBI version is 0.1 */ > +unsigned long sbi_spec_version = SBI_SPEC_VERSION_DEFAULT; > +EXPORT_SYMBOL(sbi_spec_version); > + > +struct sbiret sbi_ecall(int ext, int fid, unsigned long arg0, > + unsigned long arg1, unsigned long arg2, > + unsigned long arg3, unsigned long arg4, > + unsigned long arg5) > +{ > + struct sbiret ret; > + > + register uintptr_t a0 asm ("a0") = (uintptr_t)(arg0); > + register uintptr_t a1 asm ("a1") = (uintptr_t)(arg1); > + register uintptr_t a2 asm ("a2") = (uintptr_t)(arg2); > + register uintptr_t a3 asm ("a3") = (uintptr_t)(arg3); > + register uintptr_t a4 asm ("a4") = (uintptr_t)(arg4); > + register uintptr_t a5 asm ("a5") = (uintptr_t)(arg5); > + register uintptr_t a6 asm ("a6") = (uintptr_t)(fid); > + register uintptr_t a7 asm ("a7") = (uintptr_t)(ext); > + asm volatile ("ecall" > + : "+r" (a0), "+r" (a1) > + : "r" (a2), "r" (a3), "r" (a4), "r" (a5), "r" (a6), "r" (a7) > + : "memory"); > + ret.error = a0; > + ret.value = a1; > + > + return ret; > +} > +EXPORT_SYMBOL(sbi_ecall); > + > +static int sbi_err_map_linux_errno(int err) > +{ > + switch (err) { > + case SBI_SUCCESS: > + return 0; > + case SBI_ERR_DENIED: > + return -EPERM; > + case SBI_ERR_INVALID_PARAM: > + return -EINVAL; > + case SBI_ERR_INVALID_ADDRESS: > + return -EFAULT; > + case SBI_ERR_NOT_SUPPORTED: > + case SBI_ERR_FAILURE: > + default: > + return -ENOTSUPP; > + }; > +} > + > +/** > + * sbi_console_putchar() - Writes given character to the console device. > + * @ch: The data to be written to the console. > + * > + * Return: None > + */ > +void sbi_console_putchar(int ch) > +{ > + sbi_ecall(SBI_EXT_0_1_CONSOLE_PUTCHAR, 0, ch, 0, 0, 0, 0, 0); > +} > +EXPORT_SYMBOL(sbi_console_putchar); > + > +/** > + * sbi_console_getchar() - Reads a byte from console device. > + * > + * Returns the value read from console. > + */ > +int sbi_console_getchar(void) > +{ > + struct sbiret ret; > + > + ret = sbi_ecall(SBI_EXT_0_1_CONSOLE_GETCHAR, 0, 0, 0, 0, 0, 0, 0); > + > + return ret.error; > +} > +EXPORT_SYMBOL(sbi_console_getchar); > + > +/** > + * sbi_set_timer() - Program the timer for next timer event. > + * @stime_value: The value after which next timer event should fire. > + * > + * Return: None > + */ > +void sbi_set_timer(uint64_t stime_value) > +{ > +#if __riscv_xlen == 32 > + sbi_ecall(SBI_EXT_0_1_SET_TIMER, 0, stime_value, > + stime_value >> 32, 0, 0, 0, 0); > +#else > + sbi_ecall(SBI_EXT_0_1_SET_TIMER, 0, stime_value, 0, 0, 0, 0, 0); > +#endif > +} > +EXPORT_SYMBOL(sbi_set_timer); > + > +/** > + * sbi_shutdown() - Remove all the harts from executing supervisor code. > + * > + * Return: None > + */ > +void sbi_shutdown(void) > +{ > + sbi_ecall(SBI_EXT_0_1_SHUTDOWN, 0, 0, 0, 0, 0, 0, 0); > +} > +EXPORT_SYMBOL(sbi_shutdown); > + > +/** > + * sbi_clear_ipi() - Clear any pending IPIs for the calling hart. > + * > + * Return: None > + */ > +void sbi_clear_ipi(void) > +{ > + sbi_ecall(SBI_EXT_0_1_CLEAR_IPI, 0, 0, 0, 0, 0, 0, 0); > +} > + > +/** > + * sbi_send_ipi() - Send an IPI to any hart. > + * @hart_mask: A cpu mask containing all the target harts. > + * > + * Return: None > + */ > +void sbi_send_ipi(const unsigned long *hart_mask) > +{ > + sbi_ecall(SBI_EXT_0_1_SEND_IPI, 0, (unsigned long)hart_mask, > + 0, 0, 0, 0, 0); > +} > +EXPORT_SYMBOL(sbi_send_ipi); > + > +/** > + * sbi_remote_fence_i() - Execute FENCE.I instruction on given remote harts. > + * @hart_mask: A cpu mask containing all the target harts. > + * > + * Return: None > + */ > +void sbi_remote_fence_i(const unsigned long *hart_mask) > +{ > + sbi_ecall(SBI_EXT_0_1_REMOTE_FENCE_I, 0, (unsigned long)hart_mask, > + 0, 0, 0, 0, 0); > +} > +EXPORT_SYMBOL(sbi_remote_fence_i); > + > +/** > + * sbi_remote_sfence_vma() - Execute SFENCE.VMA instructions on given remote > + * harts for the specified virtual address range. > + * @hart_mask: A cpu mask containing all the target harts. > + * @start: Start of the virtual address > + * @size: Total size of the virtual address range. > + * > + * Return: None > + */ > +void sbi_remote_sfence_vma(const unsigned long *hart_mask, > + unsigned long start, > + unsigned long size) > +{ > + sbi_ecall(SBI_EXT_0_1_REMOTE_SFENCE_VMA, 0, > + (unsigned long)hart_mask, start, size, 0, 0, 0); > +} > +EXPORT_SYMBOL(sbi_remote_sfence_vma); > + > +/** > + * sbi_remote_sfence_vma_asid() - Execute SFENCE.VMA instructions on given > + * remote harts for a virtual address range belonging to a specific ASID. > + * > + * @hart_mask: A cpu mask containing all the target harts. > + * @start: Start of the virtual address > + * @size: Total size of the virtual address range. > + * @asid: The value of address space identifier (ASID). > + * > + * Return: None > + */ > +void sbi_remote_sfence_vma_asid(const unsigned long *hart_mask, > + unsigned long start, > + unsigned long size, > + unsigned long asid) > +{ > + sbi_ecall(SBI_EXT_0_1_REMOTE_SFENCE_VMA_ASID, 0, > + (unsigned long)hart_mask, start, size, asid, 0, 0); > +} > +EXPORT_SYMBOL(sbi_remote_sfence_vma_asid); > + > +/** > + * sbi_probe_extension() - Check if an SBI extension ID is supported or not. > + * @extid: The extension ID to be probed. > + * > + * Return: Extension specific nonzero value f yes, -ENOTSUPP otherwise. > + */ > +int sbi_probe_extension(long extid) > +{ > + struct sbiret ret; > + > + ret = sbi_ecall(SBI_EXT_BASE, SBI_BASE_PROBE_EXT, extid, 0, 0, 0, 0, 0); > + pr_err("%ld: %ld\n", ret.value, ret.error); > + if (!ret.error) > + if (ret.value) > + return ret.value; > + > + return -ENOTSUPP; > +} > +EXPORT_SYMBOL(sbi_probe_extension); > + > +static long sbi_get_spec_version(void) > +{ > + struct sbiret ret; > + > + ret = sbi_ecall(SBI_EXT_BASE, SBI_BASE_GET_SPEC_VERSION, > + 0, 0, 0, 0, 0, 0); > + if (!ret.error) > + return ret.value; > + else > + return ret.error; > +} > + > +static long sbi_get_firmware_id(void) > +{ > + struct sbiret ret; > + > + ret = sbi_ecall(SBI_EXT_BASE, SBI_BASE_GET_IMP_ID, > + 0, 0, 0, 0, 0, 0); > + if (!ret.error) > + return ret.value; > + else > + return sbi_err_map_linux_errno(ret.error); > +} > + > +static long sbi_get_firmware_version(void) > +{ > + struct sbiret ret; > + > + ret = sbi_ecall(SBI_EXT_BASE, SBI_BASE_GET_IMP_VERSION, > + 0, 0, 0, 0, 0, 0); > + if (!ret.error) > + return ret.value; > + else > + return sbi_err_map_linux_errno(ret.error); > +} > + > static void sbi_power_off(void) > { > sbi_shutdown(); > } > > -static int __init sbi_init(void) > +int __init sbi_init(void) > { > + int ret; > + > pm_power_off = sbi_power_off; > + ret = sbi_get_spec_version(); > + if (ret > 0) > + sbi_spec_version = ret; > + > + pr_info("SBI specification v%lu.%lu detected\n", > + sbi_major_version(), sbi_minor_version()); > + if (!sbi_spec_is_0_1()) > + pr_info("SBI implementation ID=0x%lx Version=0x%lx\n", > + sbi_get_firmware_id(), sbi_get_firmware_version()); > return 0; > } > -early_initcall(sbi_init); > diff --git a/arch/riscv/kernel/setup.c b/arch/riscv/kernel/setup.c > index 365ff8420bfe..f0a3c51e3d1b 100644 > --- a/arch/riscv/kernel/setup.c > +++ b/arch/riscv/kernel/setup.c > @@ -22,6 +22,7 @@ > #include > #include > #include > +#include > #include > #include > > @@ -74,6 +75,7 @@ void __init setup_arch(char **cmdline_p) > swiotlb_init(1); > #endif > > + sbi_init(); > #ifdef CONFIG_SMP > setup_smp(); > #endif > -- > 2.23.0 > LGTM. Reviewed-by: Anup Patel Regards, Anup _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv