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From: Anup Patel <anup@brainfault.org>
To: Christoph Hellwig <hch@infradead.org>
Cc: Daniel Lezcano <daniel.lezcano@linaro.org>,
	Jason Cooper <jason@lakedaemon.net>,
	Marc Zyngier <marc.zyngier@arm.com>,
	Palmer Dabbelt <palmer@sifive.com>,
	"linux-kernel@vger.kernel.org List"
	<linux-kernel@vger.kernel.org>, Atish Patra <atish.patra@wdc.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	Thomas Gleixner <tglx@linutronix.de>,
	linux-riscv@lists.infradead.org
Subject: Re: [PATCH v4 4/5] irqchip: sifive-plic: Differentiate between PLIC handler and context
Date: Sat, 19 Jan 2019 10:55:58 +0530	[thread overview]
Message-ID: <CAAhSdy2Oe44Mw66rphPHGU69DN1bnyhXH3xjrQ6DvLNsVVqgSw@mail.gmail.com> (raw)
In-Reply-To: <20190115155600.GC13095@infradead.org>

On Tue, Jan 15, 2019 at 9:26 PM Christoph Hellwig <hch@infradead.org> wrote:
>
> On Thu, Dec 27, 2018 at 04:48:20PM +0530, Anup Patel wrote:
> > We explicitly differentiate between PLIC handler and context because
> > PLIC context is for given mode of HART whereas PLIC handler is per-CPU
> > software construct meant for handling interrupts from a particular
> > PLIC context.
> >
> > To achieve this differentiation, we rename "nr_handlers" to "nr_contexts"
> > and "nr_mapped" to "nr_handlers" in plic_init().
>
> Not sure what this differenciates that we previously didn't.  As far
> as I can tell it just is a slight naming cleanup.

There is a disconnect between PLIC documentation and PLIC driver.

If we have 8 HARTs then we can have 16 PLIC contexts whereas PLIC
handlers (SW construct) are always same as number of HARTs. In other
words, there will be separate PLIC context for M-mode and S-mode of a
HART.

Linux runs in S-mode so we can only use PLIC context meant for S-mode.
This means per-CPU handlers in PLIC driver only handle PLIC S-mode
context of a HART.

This patch makes PLIC driver more readable and matching PLIC HW
documentation by differentiating between PLIC handler and PLIC
context.

Regards,
Anup

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  reply	other threads:[~2019-01-19  5:26 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-12-27 11:18 [PATCH v4 0/5] IRQ affinity support in PLIC driver Anup Patel
2018-12-27 11:18 ` [PATCH v4 1/5] irqchip: sifive-plic: Pre-compute context hart base and enable base Anup Patel
2018-12-27 11:18 ` [PATCH v4 2/5] irqchip: sifive-plic: Don't inline plic_toggle() and plic_irq_toggle() Anup Patel
2019-01-15 15:54   ` Christoph Hellwig
2019-01-19  5:00     ` Anup Patel
2018-12-27 11:18 ` [PATCH v4 3/5] irqchip: sifive-plic: Add warning in plic_init() if handler already present Anup Patel
2019-01-15 15:54   ` Christoph Hellwig
2019-01-19  5:03     ` Anup Patel
2018-12-27 11:18 ` [PATCH v4 4/5] irqchip: sifive-plic: Differentiate between PLIC handler and context Anup Patel
2019-01-15 15:56   ` Christoph Hellwig
2019-01-19  5:25     ` Anup Patel [this message]
2018-12-27 11:18 ` [PATCH v4 5/5] irqchip: sifive-plic: Implement irq_set_affinity() for SMP host Anup Patel
2019-01-15 15:57   ` Christoph Hellwig
2019-01-19  5:26     ` Anup Patel
2019-01-08 12:14 ` [PATCH v4 0/5] IRQ affinity support in PLIC driver Anup Patel
2019-01-23 18:57   ` Palmer Dabbelt

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