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a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=vhTBJZEcsjvTkvOpSV7JcEtFKAA9Exg0pMP9uE8HBUs=; b=Nq/x+MG68zZuC604eihuQzdJ9NLn8yjysFwFVwznmQJJiiKa1rwxWmTycZbE0PajR7 WoEvsjuwXi70+dpALzXFzBA7E8ALMW26619fw0O3clBgQwpRskGfBn+d9DK7JYun73D+ +WHN55Q91A6/QzEQiEKNRbpWV/1JS8Zqe7xEvyLCgLTGOAhfQcxG0QZ0v8YIt2hu6Hp5 ZbLCL543VFs2ZXXDDXsfnzQquKk23wDYtkrqkkWCkeiiA/5Su3XkJnRAF6XlGatdhoP0 DEifpsxGpeiTEdXDB9DRGurJdsQpboa8uXA9FR21I9VidSJa52EcDfgBzi9kIwmIhGc2 CRng== X-Gm-Message-State: APjAAAWq+OZmN7qTYvWNCVU4BxjJnbKNp1ctsfsm+5jiWS8w4o91euGB Tuf3UYKeSnA1QOdytuLf4h21U1f0EEMJ+1aOzxA= X-Google-Smtp-Source: APXvYqyF2repcCJOaZYS4p2lUuk5LTjS5XFEImFO3Oxk67YaRU8tEsimiGNdEpidJLWjEePzjO3jrxahGnlJVrib7EY= X-Received: by 2002:a05:600c:254b:: with SMTP id e11mr17243611wma.171.1565006193144; Mon, 05 Aug 2019 04:56:33 -0700 (PDT) MIME-Version: 1.0 References: <20190802074620.115029-1-anup.patel@wdc.com> <20190802074620.115029-8-anup.patel@wdc.com> In-Reply-To: From: Anup Patel Date: Mon, 5 Aug 2019 17:26:21 +0530 Message-ID: Subject: Re: [RFC PATCH v2 07/19] RISC-V: KVM: Implement KVM_GET_ONE_REG/KVM_SET_ONE_REG ioctls To: Christian Borntraeger X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190805_045635_083813_E9D2F1DE X-CRM114-Status: GOOD ( 14.77 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Damien Le Moal , Palmer Dabbelt , Daniel Lezcano , "kvm@vger.kernel.org" , Radim K , Anup Patel , "linux-kernel@vger.kernel.org" , Christoph Hellwig , Atish Patra , Alistair Francis , Paul Walmsley , Paolo Bonzini , Thomas Gleixner , "linux-riscv@lists.infradead.org" Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+infradead-linux-riscv=archiver.kernel.org@lists.infradead.org On Mon, Aug 5, 2019 at 5:08 PM Christian Borntraeger wrote: > > > > On 02.08.19 09:47, Anup Patel wrote: > > For KVM RISC-V, we use KVM_GET_ONE_REG/KVM_SET_ONE_REG ioctls to access > > VCPU config and registers from user-space. > > > > We have three types of VCPU registers: > > 1. CONFIG - these are VCPU config and capabilities > > 2. CORE - these are VCPU general purpose registers > > 3. CSR - these are VCPU control and status registers > > > > The CONFIG registers available to user-space are ISA and TIMEBASE. Out > > of these, TIMEBASE is a read-only register which inform user-space about > > VCPU timer base frequency. The ISA register is a read and write register > > where user-space can only write the desired VCPU ISA capabilities before > > running the VCPU. > > > > The CORE registers available to user-space are PC, RA, SP, GP, TP, A0-A7, > > T0-T6, S0-S11 and MODE. Most of these are RISC-V general registers except > > PC and MODE. The PC register represents program counter whereas the MODE > > register represent VCPU privilege mode (i.e. S/U-mode). > > > > The CSRs available to user-space are SSTATUS, SIE, STVEC, SSCRATCH, SEPC, > > SCAUSE, STVAL, SIP, and SATP. All of these are read/write registers. > > > > In future, more VCPU register types will be added (such as FP) for the > > KVM_GET_ONE_REG/KVM_SET_ONE_REG ioctls. > > While have ONE_REG will certainly work, have you considered the sync_reg scheme > (registers as part of kvm_run structure) > This will speed up the exit to QEMU as you do not have to do multiple ioctls > (each imposing a systemcall overhead) for one exit. > > Ideally you should not exit too often into qemu, but for those cases sync_regs > is faster than ONE_REG. > We will certainly explore sync_regs interface. Reducing exits to user-space will definitely help. This is the first series for KVM RISC-V so here we want to establish a stable and extensible UAPI header using which we will add support to QEMU KVM. For time being, we are using KVMTOOL for debug and development. Thanks, Anup _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv