linux-riscv.lists.infradead.org archive mirror
 help / color / mirror / Atom feed
From: Anup Patel <anup@brainfault.org>
To: Yash Shah <yash.shah@sifive.com>
Cc: Albert Ou <aou@eecs.berkeley.edu>,
	James Morse <james.morse@arm.com>,
	"linux-kernel@vger.kernel.org List"
	<linux-kernel@vger.kernel.org>,
	rrichter@marvell.com, tony.luck@intel.com,
	Borislav Petkov <bp@alien8.de>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	linux-riscv <linux-riscv@lists.infradead.org>,
	mchehab@kernel.org, linux-edac@vger.kernel.org
Subject: Re: [PATCH] riscv: move sifive_l2_cache.h to include/soc
Date: Wed, 8 Jan 2020 13:47:19 +0530	[thread overview]
Message-ID: <CAAhSdy2UAAQrzD4mgbAu1p022YLLLhUX2dJjYomyiTifoE0mBg@mail.gmail.com> (raw)
In-Reply-To: <1578463746-25279-1-git-send-email-yash.shah@sifive.com>

On Wed, Jan 8, 2020 at 11:39 AM Yash Shah <yash.shah@sifive.com> wrote:
>
> The commit 9209fb51896f ("riscv: move sifive_l2_cache.c to drivers/soc")
> moves the sifive L2 cache driver to driver/soc. It did not move the
> header file along with the driver. Therefore this patch moves the header
> file to driver/soc
>
> Signed-off-by: Yash Shah <yash.shah@sifive.com>
> ---
>  arch/riscv/include/asm/sifive_l2_cache.h | 16 ----------------
>  drivers/edac/sifive_edac.c               |  2 +-
>  drivers/soc/sifive/sifive_l2_cache.c     |  2 +-
>  include/soc/sifive/sifive_l2_cache.h     | 16 ++++++++++++++++
>  4 files changed, 18 insertions(+), 18 deletions(-)
>  delete mode 100644 arch/riscv/include/asm/sifive_l2_cache.h
>  create mode 100644 include/soc/sifive/sifive_l2_cache.h
>
> diff --git a/arch/riscv/include/asm/sifive_l2_cache.h b/arch/riscv/include/asm/sifive_l2_cache.h
> deleted file mode 100644
> index 04f6748..0000000
> --- a/arch/riscv/include/asm/sifive_l2_cache.h
> +++ /dev/null
> @@ -1,16 +0,0 @@
> -/* SPDX-License-Identifier: GPL-2.0 */
> -/*
> - * SiFive L2 Cache Controller header file
> - *
> - */
> -
> -#ifndef _ASM_RISCV_SIFIVE_L2_CACHE_H
> -#define _ASM_RISCV_SIFIVE_L2_CACHE_H
> -
> -extern int register_sifive_l2_error_notifier(struct notifier_block *nb);
> -extern int unregister_sifive_l2_error_notifier(struct notifier_block *nb);
> -
> -#define SIFIVE_L2_ERR_TYPE_CE 0
> -#define SIFIVE_L2_ERR_TYPE_UE 1
> -
> -#endif /* _ASM_RISCV_SIFIVE_L2_CACHE_H */
> diff --git a/drivers/edac/sifive_edac.c b/drivers/edac/sifive_edac.c
> index 413cdb4..c0cc72a 100644
> --- a/drivers/edac/sifive_edac.c
> +++ b/drivers/edac/sifive_edac.c
> @@ -10,7 +10,7 @@
>  #include <linux/edac.h>
>  #include <linux/platform_device.h>
>  #include "edac_module.h"
> -#include <asm/sifive_l2_cache.h>
> +#include <soc/sifive/sifive_l2_cache.h>
>
>  #define DRVNAME "sifive_edac"
>
> diff --git a/drivers/soc/sifive/sifive_l2_cache.c b/drivers/soc/sifive/sifive_l2_cache.c
> index a9ffff3..a506939 100644
> --- a/drivers/soc/sifive/sifive_l2_cache.c
> +++ b/drivers/soc/sifive/sifive_l2_cache.c
> @@ -9,7 +9,7 @@
>  #include <linux/interrupt.h>
>  #include <linux/of_irq.h>
>  #include <linux/of_address.h>
> -#include <asm/sifive_l2_cache.h>
> +#include <soc/sifive/sifive_l2_cache.h>
>
>  #define SIFIVE_L2_DIRECCFIX_LOW 0x100
>  #define SIFIVE_L2_DIRECCFIX_HIGH 0x104
> diff --git a/include/soc/sifive/sifive_l2_cache.h b/include/soc/sifive/sifive_l2_cache.h
> new file mode 100644
> index 0000000..04f6748
> --- /dev/null
> +++ b/include/soc/sifive/sifive_l2_cache.h
> @@ -0,0 +1,16 @@
> +/* SPDX-License-Identifier: GPL-2.0 */
> +/*
> + * SiFive L2 Cache Controller header file
> + *
> + */
> +
> +#ifndef _ASM_RISCV_SIFIVE_L2_CACHE_H
> +#define _ASM_RISCV_SIFIVE_L2_CACHE_H
> +
> +extern int register_sifive_l2_error_notifier(struct notifier_block *nb);
> +extern int unregister_sifive_l2_error_notifier(struct notifier_block *nb);
> +
> +#define SIFIVE_L2_ERR_TYPE_CE 0
> +#define SIFIVE_L2_ERR_TYPE_UE 1
> +
> +#endif /* _ASM_RISCV_SIFIVE_L2_CACHE_H */
> --
> 2.7.4
>

LGTM.

Reviewed-by: Anup Patel <anup@brainfault.org>

Regards,
Anup


  reply	other threads:[~2020-01-08  8:17 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-01-08  6:09 [PATCH] riscv: move sifive_l2_cache.h to include/soc Yash Shah
2020-01-08  8:17 ` Anup Patel [this message]
2020-01-11  1:04 ` Paul Walmsley
2020-01-11  1:47   ` Paul Walmsley
2020-01-11  3:57     ` Yash Shah

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=CAAhSdy2UAAQrzD4mgbAu1p022YLLLhUX2dJjYomyiTifoE0mBg@mail.gmail.com \
    --to=anup@brainfault.org \
    --cc=aou@eecs.berkeley.edu \
    --cc=bp@alien8.de \
    --cc=james.morse@arm.com \
    --cc=linux-edac@vger.kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-riscv@lists.infradead.org \
    --cc=mchehab@kernel.org \
    --cc=palmer@dabbelt.com \
    --cc=paul.walmsley@sifive.com \
    --cc=rrichter@marvell.com \
    --cc=tony.luck@intel.com \
    --cc=yash.shah@sifive.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).