[PATCH] RISC-V: defconfig: Enable NO_HZ_IDLE and HIGH_RES_TIMERS

[PATCH] RISC-V: defconfig: Enable NO_HZ_IDLE and HIGH_RES_TIMERS

[Anup Patel]

This patch enables NO_HZ_IDLE (idle dynamic ticks) and HIGH_RES_TIMERS
(hrtimers) in RV32 and RV64 defconfigs.

Both of the above options are enabled by default for architectures
such as x86, ARM, and ARM64.

The idle dynamic ticks helps use save power by stopping timer ticks
when the system is idle whereas hrtimers is a much improved timer
subsystem compared to the old "timer wheel" based system.

This patch is tested on SiFive Unleashed board and QEMU Virt machine.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
---
 arch/riscv/configs/defconfig      | 2 ++
 arch/riscv/configs/rv32_defconfig | 2 ++
 2 files changed, 4 insertions(+)

diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig
index 2fd3461e50ab..f254c352ec57 100644
--- a/arch/riscv/configs/defconfig
+++ b/arch/riscv/configs/defconfig
@@ -1,5 +1,7 @@
 CONFIG_SYSVIPC=y
 CONFIG_POSIX_MQUEUE=y
+CONFIG_NO_HZ_IDLE=y
+CONFIG_HIGH_RES_TIMERS=y
 CONFIG_IKCONFIG=y
 CONFIG_IKCONFIG_PROC=y
 CONFIG_CGROUPS=y
diff --git a/arch/riscv/configs/rv32_defconfig b/arch/riscv/configs/rv32_defconfig
index 1a911ed8e772..d5449ef805a3 100644
--- a/arch/riscv/configs/rv32_defconfig
+++ b/arch/riscv/configs/rv32_defconfig
@@ -1,5 +1,7 @@
 CONFIG_SYSVIPC=y
 CONFIG_POSIX_MQUEUE=y
+CONFIG_NO_HZ_IDLE=y
+CONFIG_HIGH_RES_TIMERS=y
 CONFIG_IKCONFIG=y
 CONFIG_IKCONFIG_PROC=y
 CONFIG_CGROUPS=y
-- 
2.17.1

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Re: [PATCH] RISC-V: defconfig: Enable NO_HZ_IDLE and HIGH_RES_TIMERS

[Anup Patel]

On Wed, May 15, 2019 at 12:00 PM Anup Patel <Anup.Patel@wdc.com> wrote:
>
> This patch enables NO_HZ_IDLE (idle dynamic ticks) and HIGH_RES_TIMERS
> (hrtimers) in RV32 and RV64 defconfigs.
>
> Both of the above options are enabled by default for architectures
> such as x86, ARM, and ARM64.
>
> The idle dynamic ticks helps use save power by stopping timer ticks
> when the system is idle whereas hrtimers is a much improved timer
> subsystem compared to the old "timer wheel" based system.
>
> This patch is tested on SiFive Unleashed board and QEMU Virt machine.
>
> Signed-off-by: Anup Patel <anup.patel@wdc.com>
> ---
>  arch/riscv/configs/defconfig      | 2 ++
>  arch/riscv/configs/rv32_defconfig | 2 ++
>  2 files changed, 4 insertions(+)
>
> diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig
> index 2fd3461e50ab..f254c352ec57 100644
> --- a/arch/riscv/configs/defconfig
> +++ b/arch/riscv/configs/defconfig
> @@ -1,5 +1,7 @@
>  CONFIG_SYSVIPC=y
>  CONFIG_POSIX_MQUEUE=y
> +CONFIG_NO_HZ_IDLE=y
> +CONFIG_HIGH_RES_TIMERS=y
>  CONFIG_IKCONFIG=y
>  CONFIG_IKCONFIG_PROC=y
>  CONFIG_CGROUPS=y
> diff --git a/arch/riscv/configs/rv32_defconfig b/arch/riscv/configs/rv32_defconfig
> index 1a911ed8e772..d5449ef805a3 100644
> --- a/arch/riscv/configs/rv32_defconfig
> +++ b/arch/riscv/configs/rv32_defconfig
> @@ -1,5 +1,7 @@
>  CONFIG_SYSVIPC=y
>  CONFIG_POSIX_MQUEUE=y
> +CONFIG_NO_HZ_IDLE=y
> +CONFIG_HIGH_RES_TIMERS=y
>  CONFIG_IKCONFIG=y
>  CONFIG_IKCONFIG_PROC=y
>  CONFIG_CGROUPS=y
> --
> 2.17.1
>

Hi All,

Any comments on this one?

@Palmer, It would be nice to have this in Linux-5.2

Regards,
Anup

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Re: [PATCH] RISC-V: defconfig: Enable NO_HZ_IDLE and HIGH_RES_TIMERS

[Palmer Dabbelt]

On Mon, 20 May 2019 01:05:22 PDT (-0700), anup@brainfault.org wrote:
> On Wed, May 15, 2019 at 12:00 PM Anup Patel <Anup.Patel@wdc.com> wrote:
>>
>> This patch enables NO_HZ_IDLE (idle dynamic ticks) and HIGH_RES_TIMERS
>> (hrtimers) in RV32 and RV64 defconfigs.
>>
>> Both of the above options are enabled by default for architectures
>> such as x86, ARM, and ARM64.
>>
>> The idle dynamic ticks helps use save power by stopping timer ticks
>> when the system is idle whereas hrtimers is a much improved timer
>> subsystem compared to the old "timer wheel" based system.
>>
>> This patch is tested on SiFive Unleashed board and QEMU Virt machine.
>>
>> Signed-off-by: Anup Patel <anup.patel@wdc.com>
>> ---
>>  arch/riscv/configs/defconfig      | 2 ++
>>  arch/riscv/configs/rv32_defconfig | 2 ++
>>  2 files changed, 4 insertions(+)
>>
>> diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig
>> index 2fd3461e50ab..f254c352ec57 100644
>> --- a/arch/riscv/configs/defconfig
>> +++ b/arch/riscv/configs/defconfig
>> @@ -1,5 +1,7 @@
>>  CONFIG_SYSVIPC=y
>>  CONFIG_POSIX_MQUEUE=y
>> +CONFIG_NO_HZ_IDLE=y
>> +CONFIG_HIGH_RES_TIMERS=y
>>  CONFIG_IKCONFIG=y
>>  CONFIG_IKCONFIG_PROC=y
>>  CONFIG_CGROUPS=y
>> diff --git a/arch/riscv/configs/rv32_defconfig b/arch/riscv/configs/rv32_defconfig
>> index 1a911ed8e772..d5449ef805a3 100644
>> --- a/arch/riscv/configs/rv32_defconfig
>> +++ b/arch/riscv/configs/rv32_defconfig
>> @@ -1,5 +1,7 @@
>>  CONFIG_SYSVIPC=y
>>  CONFIG_POSIX_MQUEUE=y
>> +CONFIG_NO_HZ_IDLE=y
>> +CONFIG_HIGH_RES_TIMERS=y
>>  CONFIG_IKCONFIG=y
>>  CONFIG_IKCONFIG_PROC=y
>>  CONFIG_CGROUPS=y
>> --
>> 2.17.1
>>
>
> Hi All,
>
> Any comments on this one?
>
> @Palmer, It would be nice to have this in Linux-5.2

My only issue here is testing: IIRC last time we tried this it ended up causing
trouble.  I'm in the process of switching to Yocto right now for my tests, so
it'll be a bit slow.

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Re: [PATCH] RISC-V: defconfig: Enable NO_HZ_IDLE and HIGH_RES_TIMERS

[Atish Patra]

> On 5/28/19 10:47 AM, Palmer Dabbelt wrote:
>> On Mon, 20 May 2019 01:05:22 PDT (-0700), anup@brainfault.org wrote:
>>> On Wed, May 15, 2019 at 12:00 PM Anup Patel <Anup.Patel@wdc.com> wrote:
>>> 
>>> This patch enables NO_HZ_IDLE (idle dynamic ticks) and HIGH_RES_TIMERS
>>> (hrtimers) in RV32 and RV64 defconfigs.
>>> 
>>> Both of the above options are enabled by default for architectures
>>> such as x86, ARM, and ARM64.
>>> 
>>> The idle dynamic ticks helps use save power by stopping timer ticks
>>> when the system is idle whereas hrtimers is a much improved timer
>>> subsystem compared to the old "timer wheel" based system.
>>> 
>>> This patch is tested on SiFive Unleashed board and QEMU Virt machine.
>>> 
>>> Signed-off-by: Anup Patel <anup.patel@wdc.com>
>>> ---
>>>  arch/riscv/configs/defconfig      | 2 ++
>>>  arch/riscv/configs/rv32_defconfig | 2 ++
>>>  2 files changed, 4 insertions(+)
>>> 
>>> diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig
>>> index 2fd3461e50ab..f254c352ec57 100644
>>> --- a/arch/riscv/configs/defconfig
>>> +++ b/arch/riscv/configs/defconfig
>>> @@ -1,5 +1,7 @@
>>>  CONFIG_SYSVIPC=y
>>>  CONFIG_POSIX_MQUEUE=y
>>> +CONFIG_NO_HZ_IDLE=y
>>> +CONFIG_HIGH_RES_TIMERS=y
>>>  CONFIG_IKCONFIG=y
>>>  CONFIG_IKCONFIG_PROC=y
>>>  CONFIG_CGROUPS=y
>>> diff --git a/arch/riscv/configs/rv32_defconfig b/arch/riscv/configs/rv32_defconfig
>>> index 1a911ed8e772..d5449ef805a3 100644
>>> --- a/arch/riscv/configs/rv32_defconfig
>>> +++ b/arch/riscv/configs/rv32_defconfig
>>> @@ -1,5 +1,7 @@
>>>  CONFIG_SYSVIPC=y
>>>  CONFIG_POSIX_MQUEUE=y
>>> +CONFIG_NO_HZ_IDLE=y
>>> +CONFIG_HIGH_RES_TIMERS=y
>>>  CONFIG_IKCONFIG=y
>>>  CONFIG_IKCONFIG_PROC=y
>>>  CONFIG_CGROUPS=y
>>> --
>>> 2.17.1
>> 
>> Hi All,
>> 
>> Any comments on this one?
>> 
>> @Palmer, It would be nice to have this in Linux-5.2
> My only issue here is testing: IIRC last time we tried this it ended up causing
> trouble.  

Are you talking about the trouble with CONFIG_NO_HZ_IDLE we were seeing last year or something else ?

CONFIG_NO_HZ_IDLE was well tested and fixed last year.

I'm in the process of switching to Yocto right now for my tests, so
> it'll be a bit slow.


-- 
Regards,
Atish

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Re: [PATCH] RISC-V: defconfig: Enable NO_HZ_IDLE and HIGH_RES_TIMERS

[Andreas Schwab]

On Mai 28 2019, Palmer Dabbelt <palmer@sifive.com> wrote:

> My only issue here is testing: IIRC last time we tried this it ended up causing
> trouble.

I've been running kernels with these settings since the beginning, and
never seen any trouble.

Andreas.

-- 
Andreas Schwab, SUSE Labs, schwab@suse.de
GPG Key fingerprint = 0196 BAD8 1CE9 1970 F4BE  1748 E4D4 88E3 0EEA B9D7
"And now for something completely different."

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Re: [PATCH] RISC-V: defconfig: Enable NO_HZ_IDLE and HIGH_RES_TIMERS

[Palmer Dabbelt]

On Wed, 29 May 2019 01:00:35 PDT (-0700), schwab@suse.de wrote:
> On Mai 28 2019, Palmer Dabbelt <palmer@sifive.com> wrote:
>
>> My only issue here is testing: IIRC last time we tried this it ended up causing
>> trouble.
>
> I've been running kernels with these settings since the beginning, and
> never seen any trouble.

OK, I'm happy with it.

Reviewed-by: Palmer Dabbelt <palmer@sifive.com>

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Re: [PATCH] RISC-V: defconfig: Enable NO_HZ_IDLE and HIGH_RES_TIMERS

[Paul Walmsley]

On Fri, 31 May 2019, Palmer Dabbelt wrote:

> On Wed, 29 May 2019 01:00:35 PDT (-0700), schwab@suse.de wrote:
> > On Mai 28 2019, Palmer Dabbelt <palmer@sifive.com> wrote:
> > 
> > > My only issue here is testing: IIRC last time we tried this it ended up
> > > causing
> > > trouble.
> > 
> > I've been running kernels with these settings since the beginning, and
> > never seen any trouble.
> 
> OK, I'm happy with it.
> 
> Reviewed-by: Palmer Dabbelt <palmer@sifive.com>

Thanks, queued for v5.3.

- Paul

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Re: [PATCH] RISC-V: defconfig: Enable NO_HZ_IDLE and HIGH_RES_TIMERS

[Christoph Hellwig]

On Mon, Jun 03, 2019 at 09:44:44AM -0700, Paul Walmsley wrote:
> > Reviewed-by: Palmer Dabbelt <palmer@sifive.com>
> 
> Thanks, queued for v5.3.

Where do you apply these patches to?  Is there a chance we could just
set up a multi commiter riscv tree insted of growing the number of
trees?

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