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a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=rGPwK2qvLOHHeiShwuNhPOMbtWTnBcRhDfAqRa9bPnI=; b=uH64BnzSf4N7vspxBrQMgm6hssDZrKgOajUEoX+qsZUHdsC8El73begSoJGnwznDYp fe8kYY445FoBl0pv/1XpOKC8x0wrVPuNEsXujNoY4o06YDF+PWZHXrAOxklaPGN722Ci jS0Gd5R05DcDyvpe1kJRFHXWPVAVfLyS6+8cgTIvLQGILXmsMhRr6ClYX2L6OMDqHl9Y uAUBSpLwlxk3BJvL1C8WM+25oVVsGMJG0RQq2anTIsRFulEapSWIaYZagqqCKidUjuiX dzKnwJjS0OmxO6SZLlhZpWkIg/G7VKsU/shSK6mZmLAu1YmN72DZoB0f9nl8P5xNC5Px aQRQ== X-Gm-Message-State: APjAAAXkTDMhqb+02EBM34l7UL9MmuIRUHga70udRlDREVjyTkntqVWU Gv4hV2a5FCVjxETNZHgLv0VYv35vINKcNH/XjHmrWA== X-Google-Smtp-Source: APXvYqxklwi8yCUDuyoen0TIoT0yvGecablQ+JGHeUfmD0h/tYBf6OcxZkVpOTSwjlMub9h3JNNau7T9OpBwuNpEf48= X-Received: by 2002:ac2:447b:: with SMTP id y27mr13253233lfl.135.1571866492629; Wed, 23 Oct 2019 14:34:52 -0700 (PDT) MIME-Version: 1.0 References: <1571847755-20388-1-git-send-email-alan.mikhak@sifive.com> In-Reply-To: From: Alan Mikhak Date: Wed, 23 Oct 2019 14:34:41 -0700 Message-ID: Subject: Re: [PATCH] irqchip: Skip contexts other supervisor in plic_init() To: Paul Walmsley X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20191023_143454_859638_76170F07 X-CRM114-Status: GOOD ( 16.20 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: jason@lakedaemon.net, maz@kernel.org, Palmer Dabbelt , linux-kernel@vger.kernel.org, Christoph Hellwig , linux-riscv@lists.infradead.org, tglx@linutronix.de Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+infradead-linux-riscv=archiver.kernel.org@lists.infradead.org On Wed, Oct 23, 2019 at 11:54 AM Paul Walmsley wrote: > > + hch > > On Wed, 23 Oct 2019, Alan Mikhak wrote: > > > From: Alan Mikhak > > > > Modify plic_init() to skip .dts interrupt contexts other > > than supervisor external interrupt. > > Might be good to explain the motivation here. The .dts entry for plic may specify multiple interrupt contexts. For example, it may assign two entries IRQ_M_EXT and IRQ_S_EXT, in that order, to the same interrupt controller. This patch modifies plic_init() to skip the IRQ_M_EXT context since IRQ_S_EXT is currently the only supported context. If IRQ_M_EXT is not skipped, plic_init() will report "handler already present for context" when it comes across the IRQ_S_EXT context in the next iteration of its loop. Without this patch, .dts would have to be edited to replace the value of IRQ_M_EXT with -1 for it to be skipped. I will add the above explanation in a v2 patch description, if it sounds reasonable. > > > > > Signed-off-by: Alan Mikhak > > --- > > drivers/irqchip/irq-sifive-plic.c | 4 ++-- > > 1 file changed, 2 insertions(+), 2 deletions(-) > > > > diff --git a/drivers/irqchip/irq-sifive-plic.c b/drivers/irqchip/irq-sifive-plic.c > > index c72c036aea76..5f2a773d5669 100644 > > --- a/drivers/irqchip/irq-sifive-plic.c > > +++ b/drivers/irqchip/irq-sifive-plic.c > > @@ -251,8 +251,8 @@ static int __init plic_init(struct device_node *node, > > continue; > > } > > > > - /* skip context holes */ > > - if (parent.args[0] == -1) > > + /* skip contexts other than supervisor external interrupt */ > > + if (parent.args[0] != IRQ_S_EXT) > > continue; > > Will this need to change for RISC-V M-mode Linux support? > > https://lore.kernel.org/linux-riscv/20191017173743.5430-1-hch@lst.de/ > > > - Paul > > _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv