From: Guo Ren <guoren@kernel.org>
To: Anup Patel <anup@brainfault.org>
Cc: Guo Ren <guoren@linux.alibaba.com>,
Jason Cooper <jason@lakedaemon.net>,
wesley@sifive.com, Marc Zyngier <maz@kernel.org>,
Palmer Dabbelt <palmerdabbelt@google.com>,
"linux-kernel@vger.kernel.org List"
<linux-kernel@vger.kernel.org>,
linux-riscv <linux-riscv@lists.infradead.org>,
Atish Patra <atish.patra@wdc.com>,
Yash Shah <yash.shah@sifive.com>, Zong Li <zong.li@sifive.com>,
Paul Walmsley <paul.walmsley@sifive.com>,
Greentime Hu <greentime.hu@sifive.com>,
Thomas Gleixner <tglx@linutronix.de>,
Christoph Hellwig <hch@lst.de>
Subject: Re: [PATCH 2/3] irqchip/irq-sifive-plic: Fixup couldn't broadcast to multi CPUs
Date: Sat, 24 Oct 2020 11:38:40 +0800 [thread overview]
Message-ID: <CAJF2gTRnDxrOBTLL+=Kk9BjftH-xE=NX1zpLaxv7Xsb4L5XgAA@mail.gmail.com> (raw)
In-Reply-To: <CAAhSdy120ZR4ZbkHo8Us+CugaeegSR6iFu9jgHPuyvDAQwnOhQ@mail.gmail.com>
On Fri, Oct 23, 2020 at 8:17 PM Anup Patel <anup@brainfault.org> wrote:
>
> On Fri, Oct 23, 2020 at 3:48 PM <guoren@kernel.org> wrote:
> >
> > From: Guo Ren <guoren@linux.alibaba.com>
> >
> > If "echo 3 > /proc/irq/1/smp_affinity", we want irq 1 could be
> > broadcast to CPU0 & CPU1 and one of them would pick up the irq
> > handler.
> >
> > But current implementation couldn't let multi CPUs process the
> > same IRQ concurrent.
> >
> > Signed-off-by: Guo Ren <guoren@linux.alibaba.com>
> > ---
> > drivers/irqchip/irq-sifive-plic.c | 23 ++++++-----------------
> > 1 file changed, 6 insertions(+), 17 deletions(-)
> >
> > diff --git a/drivers/irqchip/irq-sifive-plic.c b/drivers/irqchip/irq-sifive-plic.c
> > index 2e56576..0003322 100644
> > --- a/drivers/irqchip/irq-sifive-plic.c
> > +++ b/drivers/irqchip/irq-sifive-plic.c
> > @@ -114,15 +114,12 @@ static inline void plic_irq_toggle(const struct cpumask *mask,
> > static void plic_irq_unmask(struct irq_data *d)
> > {
> > struct cpumask amask;
> > - unsigned int cpu;
> > struct plic_priv *priv = irq_get_chip_data(d->irq);
> >
> > cpumask_and(&amask, &priv->lmask, cpu_online_mask);
> > - cpu = cpumask_any_and(irq_data_get_affinity_mask(d),
> > - &amask);
> > - if (WARN_ON_ONCE(cpu >= nr_cpu_ids))
> > - return;
> > - plic_irq_toggle(cpumask_of(cpu), d, 1);
> > + cpumask_and(&amask, &amask, irq_data_get_affinity_mask(d));
> > +
> > + plic_irq_toggle(&amask, d, 1);
> > }
> >
> > static void plic_irq_mask(struct irq_data *d)
> > @@ -136,24 +133,16 @@ static void plic_irq_mask(struct irq_data *d)
> > static int plic_set_affinity(struct irq_data *d,
> > const struct cpumask *mask_val, bool force)
> > {
> > - unsigned int cpu;
> > struct cpumask amask;
> > struct plic_priv *priv = irq_get_chip_data(d->irq);
> >
> > cpumask_and(&amask, &priv->lmask, mask_val);
> > + cpumask_and(&amask, &amask, cpu_online_mask);
> >
> > - if (force)
> > - cpu = cpumask_first(&amask);
> > - else
> > - cpu = cpumask_any_and(&amask, cpu_online_mask);
> > -
> > - if (cpu >= nr_cpu_ids)
> > - return -EINVAL;
> > + irq_data_update_effective_affinity(d, &amask);
> >
> > plic_irq_toggle(&priv->lmask, d, 0);
> > - plic_irq_toggle(cpumask_of(cpu), d, 1);
> > -
> > - irq_data_update_effective_affinity(d, cpumask_of(cpu));
> > + plic_irq_toggle(&amask, d, 1);
> >
> > return IRQ_SET_MASK_OK_DONE;
> > }
> > --
> > 2.7.4
> >
>
> In the past, a similar patch was proposed by Zong Li (SiFive). We
> have good reasons to not allow multiple CPUs handle the same IRQ.
>
> Refer, https://lkml.org/lkml/2020/4/26/201
>
> NACK from my side.
Thx for sharing the information, I agree with Zong Li & Greentime's
aspect: Don't limit the usage of PLIC! We could let (one hart -> one
irq) as default.
I also agree that using irq broadcast indiscriminately can cause
performance problems. (Anup and Mark Z's view)
I think you've discussed enough at that time and l won't persist the patch.
--
Best Regards
Guo Ren
ML: https://lore.kernel.org/linux-csky/
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next prev parent reply other threads:[~2020-10-24 3:39 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-10-23 10:17 [PATCH 1/3] irqchip/irq-sifive-plic: Fixup wrong size of xxx_PER_HART and reg base guoren
2020-10-23 10:17 ` [PATCH 2/3] irqchip/irq-sifive-plic: Fixup couldn't broadcast to multi CPUs guoren
2020-10-23 11:27 ` Anup Patel
2020-10-24 3:38 ` Guo Ren [this message]
2020-10-23 10:17 ` [PATCH 3/3] irqchip/irq-sifive-plic: Fixup set_affinity enable irq unexpected guoren
2020-10-23 11:33 ` Anup Patel
2020-10-23 11:42 ` [PATCH 1/3] irqchip/irq-sifive-plic: Fixup wrong size of xxx_PER_HART and reg base Anup Patel
2020-10-24 3:09 ` Guo Ren
2020-10-25 9:17 ` Anup Patel
2020-10-26 15:01 ` Guo Ren
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