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a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=WM5R1w6ZezI/U8oeoimaxsFIAEeSSoKIeGsMNKCHrOU=; b=su5/PwdKZX+ISjiYjC9JuvBpTH9GjRmFZqQRpX+1t8ddVaeJ29KqgLsCA+V8bBOY+V bVImMC5Z3CaEXkAplGe8DFr1w9uUOMkSAJgToEjg292N8lyIt2GaVFGvROBI3ROSjezx N9OLUGrxn4xssFpEHZVT+BDylKUaXosA0NNp/cm7V/KqtaS4iRFW8sJpBx+2isjFs61w OdE60qNX5lXONYk0ZdrroBdYXg9DWSc2wQgPEiQM7+S35JzC5le2taycrG+3TBGmL0oq ux2blQrND8jsGUdsdR/DeWuhCCBSklzhJ7zTF/tmktPvMoAnMBiEUgBx17AFf2MDTkYk j/bQ== X-Gm-Message-State: APjAAAXitEU5SED4Vzsw5dwcMFgeSRyYZNFA9sH3eik/VkNlGIAqJcmM khZiJehfI3yLNjLPnIixbx4tR/XUPh9UJghiibQ= X-Google-Smtp-Source: APXvYqxaF6HN4Qke9gmz3jYRh+w8mmBxBNf6ZxmxMIqo3nQ5zpxPLpKGvTx8Va1CrAD4fJ6XJ5TLEzX+iOAKCqrnz5A= X-Received: by 2002:a2e:8696:: with SMTP id l22mr7985367lji.201.1565266744317; Thu, 08 Aug 2019 05:19:04 -0700 (PDT) MIME-Version: 1.0 References: In-Reply-To: From: Charles Papon Date: Thu, 8 Aug 2019 14:18:53 +0200 Message-ID: Subject: Re: [PATCH] riscv: kbuild: drop CONFIG_RISCV_ISA_C To: Bin Meng X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190808_051907_317670_93E9C36B X-CRM114-Status: GOOD ( 11.31 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Atish Patra , linux-riscv , linux-kernel , Paul Walmsley Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+infradead-linux-riscv=archiver.kernel.org@lists.infradead.org Please do not drop it. Compressed instruction extension has some specific overhead in small RISC-V FPGA softcore, especialy in the ones which can't implement the register file read in a asynchronous manner because of the FPGA technology. What are reasons to enforce RVC ? On Wed, Aug 7, 2019 at 2:29 PM Bin Meng wrote: > > On Wed, Aug 7, 2019 at 10:30 AM Paul Walmsley wrote: > > > > > > The baseline ISA support requirement for the RISC-V Linux kernel > > mandates compressed instructions, so it doesn't make sense for > > compressed instruction support to be configurable. > > > > Signed-off-by: Paul Walmsley > > Cc: Atish Patra > > > > --- > > arch/riscv/Kconfig | 10 ---------- > > arch/riscv/Makefile | 2 +- > > 2 files changed, 1 insertion(+), 11 deletions(-) > > > > Reviewed-by: Bin Meng > > _______________________________________________ > linux-riscv mailing list > linux-riscv@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-riscv _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv