linux-riscv.lists.infradead.org archive mirror
 help / color / mirror / Atom feed
From: Atish Patra <atishp@atishpatra.org>
To: Sean Christopherson <seanjc@google.com>
Cc: Atish Patra <atishp@rivosinc.com>,
	linux-kernel@vger.kernel.org,  Albert Ou <aou@eecs.berkeley.edu>,
	Anup Patel <anup@brainfault.org>, Guo Ren <guoren@kernel.org>,
	 kvm-riscv@lists.infradead.org, kvm@vger.kernel.org,
	 linux-riscv@lists.infradead.org,
	Mark Rutland <mark.rutland@arm.com>,
	 Palmer Dabbelt <palmer@dabbelt.com>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	 Will Deacon <will@kernel.org>
Subject: Re: [RFC 8/9] RISC-V: KVM: Implement perf support
Date: Wed, 7 Dec 2022 00:06:04 -0800	[thread overview]
Message-ID: <CAOnJCU+Eo7do0Rd+S4RBOMYpY+sG8ODqpkqA-Cii92bO-cG5+Q@mail.gmail.com> (raw)
In-Reply-To: <Y4oxNbQwOldICdnw@google.com>

On Fri, Dec 2, 2022 at 9:09 AM Sean Christopherson <seanjc@google.com> wrote:
>
> On Mon, Jul 18, 2022, Atish Patra wrote:
> > RISC-V SBI PMU & Sscofpmf ISA extension allows supporting perf in
> > the virtualization enviornment as well. KVM implementation
> > relies on SBI PMU extension for most of the part while traps
> > & emulates the CSRs read for counter access.
>
> For the benefit of non-RISCV people, the changelog (and documentation?) should
> explain why RISC-V doesn't need to tap into kvm_register_perf_callbacks().

As per my understanding, kvm_register_perf_callbacks is only useful
during event sampling for guests. Please let me know if I missed
something.
This series doesn't support sampling and guest counter overflow
interrupt yet.  That's why kvm_register_perf_callbacks support is
missing.
I will add kvm_register_perf_callbacks in the next revision along with
interrupt support.

> Presumably there's something in the "RISC-V SBI PMU & Sscofpmf ISA extension" spec
> that allows hardware to differentiate between events that are for guest vs. host?

Not directly. The Sscofpmf extension does have privilege mode specific
filtering bits[1] i.e. VSINH and VUINH which will indicate if the
events are specific to guest.
But that is only true if the hypervisor has enabled those bits. As I
said above, RISC-V do need to tap into kvm_register_perf_callbacks as
well.

[1] https://drive.google.com/file/d/171j4jFjIkKdj5LWcExphq4xG_2sihbfd/edit

-- 
Regards,
Atish

_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

  reply	other threads:[~2022-12-07  8:06 UTC|newest]

Thread overview: 46+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-07-18 17:01 [RFC 0/9] KVM perf support Atish Patra
2022-07-18 17:01 ` [RFC 1/9] RISC-V: Define a helper function to probe number of hardware counters Atish Patra
2022-11-01 12:30   ` Andrew Jones
2022-11-21 23:50     ` Atish Patra
2022-07-18 17:01 ` [RFC 2/9] RISC-V: Define a helper function to return counter width Atish Patra
2022-07-18 17:01 ` [RFC 3/9] RISC-V: KVM: Define a probe function for SBI extension data structures Atish Patra
2022-11-01 15:32   ` Andrew Jones
2022-07-18 17:02 ` [RFC 4/9] RISC-V: KVM: Improve privilege mode filtering for perf Atish Patra
2022-11-01 12:51   ` Andrew Jones
2022-11-09 13:42   ` Sergey Matyukevich
2022-11-22  0:21     ` Atish Patra
2022-07-18 17:02 ` [RFC 5/9] RISC-V: KVM: Add skeleton support " Atish Patra
2022-11-01 14:13   ` Andrew Jones
2022-11-23  0:46     ` Atish Patra
2022-11-23  1:34       ` Atish Patra
2022-11-23 13:36         ` Andrew Jones
2022-11-24  9:04           ` Atish Patra
2022-11-24 10:55             ` Andrew Jones
2022-11-23 13:11       ` Andrew Jones
2022-11-24  9:09         ` Atish Patra
2022-11-24 11:14           ` Andrew Jones
2022-07-18 17:02 ` [RFC 6/9] RISC-V: KVM: Add SBI PMU extension support Atish Patra
2022-11-01 14:26   ` Andrew Jones
2022-11-22 23:08     ` Atish Patra
2022-11-23 13:58       ` Andrew Jones
2022-11-24 10:18         ` Atish Patra
2022-11-24 10:50           ` Andrew Jones
2022-11-24 12:59             ` Anup Patel
2022-11-28 21:00               ` Atish Patra
2022-07-18 17:02 ` [RFC 7/9] RISC-V: KVM: Implement trap & emulate for hpmcounters Atish Patra
2022-11-01 14:35   ` Andrew Jones
2022-11-22 23:11     ` Atish Patra
2022-07-18 17:02 ` [RFC 8/9] RISC-V: KVM: Implement perf support Atish Patra
2022-09-20  2:24   ` Eric Lin
2022-09-23 21:04     ` Atish Patra
2022-11-01 15:31   ` Andrew Jones
2022-11-23  0:45     ` Atish Patra
2022-11-23 14:22       ` Andrew Jones
2022-12-02  9:08         ` Atish Patra
2022-12-02 11:37           ` Andrew Jones
2022-12-07  8:49             ` Atish Patra
2022-12-02 17:09   ` Sean Christopherson
2022-12-07  8:06     ` Atish Patra [this message]
2022-12-07 16:31       ` Sean Christopherson
2022-12-08  1:11         ` Atish Patra
2022-07-18 17:02 ` [RFC 9/9] RISC-V: KVM: Implement firmware events Atish Patra

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=CAOnJCU+Eo7do0Rd+S4RBOMYpY+sG8ODqpkqA-Cii92bO-cG5+Q@mail.gmail.com \
    --to=atishp@atishpatra.org \
    --cc=anup@brainfault.org \
    --cc=aou@eecs.berkeley.edu \
    --cc=atishp@rivosinc.com \
    --cc=guoren@kernel.org \
    --cc=kvm-riscv@lists.infradead.org \
    --cc=kvm@vger.kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-riscv@lists.infradead.org \
    --cc=mark.rutland@arm.com \
    --cc=palmer@dabbelt.com \
    --cc=paul.walmsley@sifive.com \
    --cc=seanjc@google.com \
    --cc=will@kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).