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bh=0+6Ztw7jbOmA581hZd3dtxpZftTR2fcd6tnRuJa6WYo=; b=NK3LPInaGPKVYzmI3tv3t0S15ZSWuDFQPecnmrcs0/KEW3NBDMdn63q52lB6gnQda9 aFwm6fRZHqaq1jFFyzC6ed389UzOntLlljGJ56dT/pKcOAZDHzFWMc1Y5nrclWeddJQX hb4JlGs4ccVdE5ReO1iApVpCEvkkWL+JcwnGoTJKsAKVIZT0PJaVyid0/mhkx7qPogFG fzc1mlEK1RrN5t8FVpxAP+yrui1Uak1D8SBYflo+bdeS92ryDkO2yJC7/8+OG8dHpybP VQ7HLyCyYs3T+++A47Z3N4xnJAcHX6e/WYDS6Vsr8w/khZuUndKVneQehj2eSTlOQ1yw 9xtQ== X-Gm-Message-State: AOAM5315aI3JUb6k+dhiAm5BnXLyw9hQ4sYCVQMpZknJa/a2niPn1qM2 XbTSIweV1VXD22+oUEWBm7UBHdwruoSZ4YlhwD/a X-Google-Smtp-Source: ABdhPJyrzsYD5zMnBZ/1QiHJ4BOApq7CZqI4Dso1cg5+duue25ZASsBHhP1llxgj03dQFqrMSTwYL8hP5liEYyS/wtc= X-Received: by 2002:a92:91db:: with SMTP id e88mr1178834ill.126.1602552713836; Mon, 12 Oct 2020 18:31:53 -0700 (PDT) MIME-Version: 1.0 References: <20201012135724.110579-1-greentime.hu@sifive.com> In-Reply-To: <20201012135724.110579-1-greentime.hu@sifive.com> From: Atish Patra Date: Mon, 12 Oct 2020 18:31:43 -0700 Message-ID: Subject: Re: [PATCH 1/2] irqchip/sifive-plic: Enable or disable interrupt based on its previous setting To: Greentime Hu X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20201012_213155_595630_0AFB3F5E X-CRM114-Status: GOOD ( 21.09 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Jason Cooper , Marc Zyngier , "linux-kernel@vger.kernel.org List" , Palmer Dabbelt , Paul Walmsley , Thomas Gleixner , linux-riscv Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org On Mon, Oct 12, 2020 at 6:57 AM Greentime Hu wrote: > > It will always enable the interrupt after calling plic_set_affinity() > however it should set to its previous setting. Staying disabled or enabled. > > This patch can also fix this pwm hang issue in Unleashed board. > > [ 919.015783] rcu: INFO: rcu_sched detected stalls on CPUs/tasks: > [ 919.020922] rcu: 0-...0: (0 ticks this GP) > idle=7d2/1/0x4000000000000002 softirq=1424/1424 fqs=105807 > [ 919.030295] (detected by 1, t=225825 jiffies, g=1561, q=3496) > [ 919.036109] Task dump for CPU 0: > [ 919.039321] kworker/0:1 R running task 0 30 2 0x00000008 > [ 919.046359] Workqueue: events set_brightness_delayed > [ 919.051302] Call Trace: > [ 919.053738] [] __schedule+0x194/0x4de > [ 982.035783] rcu: INFO: rcu_sched detected stalls on CPUs/tasks: > [ 982.040923] rcu: 0-...0: (0 ticks this GP) > idle=7d2/1/0x4000000000000002 softirq=1424/1424 fqs=113325 > [ 982.050294] (detected by 1, t=241580 jiffies, g=1561, q=3509) > [ 982.056108] Task dump for CPU 0: > [ 982.059321] kworker/0:1 R running task 0 30 2 0x00000008 > [ 982.066359] Workqueue: events set_brightness_delayed > [ 982.071302] Call Trace: > [ 982.073739] [] __schedule+0x194/0x4de > [..] > > Fixes: bb0fed1c60cc ("irqchip/sifive-plic: Switch to fasteoi flow") > Signed-off-by: Greentime Hu > --- > drivers/irqchip/irq-sifive-plic.c | 5 ++++- > 1 file changed, 4 insertions(+), 1 deletion(-) > > diff --git a/drivers/irqchip/irq-sifive-plic.c b/drivers/irqchip/irq-sifive-plic.c > index eaa3e9fe54e9..4cc8a2657a6d 100644 > --- a/drivers/irqchip/irq-sifive-plic.c > +++ b/drivers/irqchip/irq-sifive-plic.c > @@ -137,6 +137,7 @@ static int plic_set_affinity(struct irq_data *d, > const struct cpumask *mask_val, bool force) > { > unsigned int cpu; > + bool enable; > struct cpumask amask; > struct plic_priv *priv = irq_get_chip_data(d->irq); > > @@ -150,8 +151,10 @@ static int plic_set_affinity(struct irq_data *d, > if (cpu >= nr_cpu_ids) > return -EINVAL; > > + enable = !irqd_irq_disabled(d); > plic_irq_toggle(&priv->lmask, d, 0); > - plic_irq_toggle(cpumask_of(cpu), d, 1); > + /* Keep its original setting. */ > + plic_irq_toggle(cpumask_of(cpu), d, enable); > > irq_data_update_effective_affinity(d, cpumask_of(cpu)); > > -- > 2.28.0 > > > _______________________________________________ > linux-riscv mailing list > linux-riscv@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-riscv LGTM. Reviewed-by: Atish Patra -- Regards, Atish _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv