From: Anup Patel <Anup.Patel@wdc.com>
To: Palmer Dabbelt <palmer@sifive.com>
Cc: "aou@eecs.berkeley.edu" <aou@eecs.berkeley.edu>,
Greg KH <gregkh@linuxfoundation.org>,
"anup@brainfault.org" <anup@brainfault.org>,
Paul Walmsley <paul.walmsley@sifive.com>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
Christoph Hellwig <hch@infradead.org>,
Atish Patra <Atish.Patra@wdc.com>,
Alistair Francis <Alistair.Francis@wdc.com>,
"rkir@google.com" <rkir@google.com>,
"linux-riscv@lists.infradead.org"
<linux-riscv@lists.infradead.org>
Subject: RE: [PATCH v2 2/2] RISC-V: defconfig: Enable Goldfish RTC driver
Date: Mon, 14 Oct 2019 09:20:19 +0000 [thread overview]
Message-ID: <MN2PR04MB606160F5306A5F3C5D97FB788D900@MN2PR04MB6061.namprd04.prod.outlook.com> (raw)
In-Reply-To: <mhng-edb410db-fdd1-46f6-84c3-ae3b843f7e3a@palmer-si-x1c4>
> -----Original Message-----
> From: Palmer Dabbelt <palmer@sifive.com>
> Sent: Saturday, October 12, 2019 11:09 PM
> To: Anup Patel <Anup.Patel@wdc.com>
> Cc: Paul Walmsley <paul.walmsley@sifive.com>; aou@eecs.berkeley.edu;
> Greg KH <gregkh@linuxfoundation.org>; rkir@google.com; Atish Patra
> <Atish.Patra@wdc.com>; Alistair Francis <Alistair.Francis@wdc.com>;
> Christoph Hellwig <hch@infradead.org>; anup@brainfault.org; linux-
> riscv@lists.infradead.org; linux-kernel@vger.kernel.org; Anup Patel
> <Anup.Patel@wdc.com>
> Subject: Re: [PATCH v2 2/2] RISC-V: defconfig: Enable Goldfish RTC driver
>
> On Tue, 24 Sep 2019 23:38:08 PDT (-0700), Anup Patel wrote:
> > We have Goldfish RTC device available on QEMU RISC-V virt machine
> > hence enable required driver in RV32 and RV64 defconfigs.
> >
> > Signed-off-by: Anup Patel <anup.patel@wdc.com>
> > ---
> > arch/riscv/configs/defconfig | 3 +++
> > arch/riscv/configs/rv32_defconfig | 3 +++
> > 2 files changed, 6 insertions(+)
> >
> > diff --git a/arch/riscv/configs/defconfig
> > b/arch/riscv/configs/defconfig index 3efff552a261..57b4f67b0c0b 100644
> > --- a/arch/riscv/configs/defconfig
> > +++ b/arch/riscv/configs/defconfig
> > @@ -73,7 +73,10 @@ CONFIG_USB_STORAGE=y CONFIG_USB_UAS=y
> > CONFIG_MMC=y CONFIG_MMC_SPI=y
> > +CONFIG_RTC_CLASS=y
> > +CONFIG_RTC_DRV_GOLDFISH=y
> > CONFIG_VIRTIO_MMIO=y
> > +CONFIG_GOLDFISH=y
> > CONFIG_EXT4_FS=y
> > CONFIG_EXT4_FS_POSIX_ACL=y
> > CONFIG_AUTOFS4_FS=y
> > diff --git a/arch/riscv/configs/rv32_defconfig
> > b/arch/riscv/configs/rv32_defconfig
> > index 7da93e494445..50716c1395aa 100644
> > --- a/arch/riscv/configs/rv32_defconfig
> > +++ b/arch/riscv/configs/rv32_defconfig
> > @@ -69,7 +69,10 @@ CONFIG_USB_OHCI_HCD=y
> > CONFIG_USB_OHCI_HCD_PLATFORM=y CONFIG_USB_STORAGE=y
> CONFIG_USB_UAS=y
> > +CONFIG_RTC_CLASS=y
> > +CONFIG_RTC_DRV_GOLDFISH=y
> > CONFIG_VIRTIO_MMIO=y
> > +CONFIG_GOLDFISH=y
> > CONFIG_SIFIVE_PLIC=y
> > CONFIG_EXT4_FS=y
> > CONFIG_EXT4_FS_POSIX_ACL=y
> > --
> > 2.17.1
>
> Reviewed-by: Palmer Dabbelt <palmer@sifive.com>
>
> IIRC there was supposed to be a follow-up to your QEMU patch set to rebase
> it on top of a refactoring of their RTC code, but I don't see it in my inbox. LMK
> if I missed it, as QEMU's soft freeze is in a few weeks and I'd like to make
> sure I get everything in.
I was hoping for QEMU RTC refactoring to be merged soon but it has not
happened so far. I will wait couple of more days then send v3 of QEMU
patches.
>
> Additionally: we should refactor our Kconfig to have some sort of
> CONFIG_SOC_VIRT that selects this stuff, like we have the
> CONFIG_SOC_SIFIVE.
> This will explicitly document why devices are in the defconfig, avoid
> duplicating a bunch of stuff between defconfigs, and provide an example of
> how we support multiple SOCs in a single image.
Yes, indeed we need CONFIG_SOC_VIRT but this will be a separate patch.
>
> I don't see why either of these should block merging the patch, though.
Thanks,
Anup
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
next prev parent reply other threads:[~2019-10-14 9:20 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-09-25 6:37 [PATCH v2 0/2] Enable Goldfish RTC for RISC-V Anup Patel
2019-09-25 6:37 ` [PATCH v2 1/2] platform: goldfish: Allow goldfish drivers for archs with IOMEM and DMA Anup Patel
2019-09-25 6:38 ` [PATCH v2 2/2] RISC-V: defconfig: Enable Goldfish RTC driver Anup Patel
2019-10-12 17:38 ` Palmer Dabbelt
2019-10-14 9:20 ` Anup Patel [this message]
2019-10-22 19:23 ` Paul Walmsley
2019-10-22 22:53 ` Alistair Francis
2019-10-23 1:06 ` Paul Walmsley
2019-10-23 3:24 ` Anup Patel
2019-10-23 6:00 ` Paul Walmsley
2019-10-23 6:12 ` Anup Patel
2019-10-23 6:49 ` Paul Walmsley
2019-10-23 17:42 ` Alistair Francis
2019-10-23 18:20 ` Paul Walmsley
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=MN2PR04MB606160F5306A5F3C5D97FB788D900@MN2PR04MB6061.namprd04.prod.outlook.com \
--to=anup.patel@wdc.com \
--cc=Alistair.Francis@wdc.com \
--cc=Atish.Patra@wdc.com \
--cc=anup@brainfault.org \
--cc=aou@eecs.berkeley.edu \
--cc=gregkh@linuxfoundation.org \
--cc=hch@infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-riscv@lists.infradead.org \
--cc=palmer@sifive.com \
--cc=paul.walmsley@sifive.com \
--cc=rkir@google.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).