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From: abner.chang@hpe.com (Chang, Abner (HPS SW/FW Technologist))
To: linux-riscv@lists.infradead.org
Subject: SBI extension proposal
Date: Fri, 2 Nov 2018 06:31:10 +0000	[thread overview]
Message-ID: <TU4PR8401MB09581F92A2F7C0C7FFFA190EFFCF0@TU4PR8401MB0958.NAMPRD84.PROD.OUTLOOK.COM> (raw)
In-Reply-To: <cf729ca1-3ad0-8fe8-5cfa-d09d6c28d831@wdc.com>


> >>> -- int sbi_hart_up(unsigned long hartid, unsigned long start,
> >>> unsigned long priv)
> >>>
> >>> Brings up "hartid" either during initial boot or after a
> >>> sbi_hart_down SBI call.
> >>>
> >>> "start" points to a runtime-specified address where a hart can enter
> >>> into supervisor mode. This must be a physical address.
> >>>
> >>> "priv" is a private data that caller can use to pass information
> >>> about execution context.
> >>>
> >>> Return the appropriate SBI error code.
> >>>
> >>> -- int sbi_hart_suspend(u32 state, unsigned long resume_entry,
> >>> unsigned long priv)
> >>>
> >>> Suspends the calling hart to a particular power state. Suspended
> >>> hart will automatically wake-up based on some wakeup events at
> >>> resume_entry physical address.
> >>>
> >>> "priv" is a private data that caller can use to pass information
> >>> about execution context. The SBI implementation must save a copy so
> >>> that caller can reuse while restoring hart from suspend.
> >>>
> >>> Return the appropriate SBI error code.
> >>>
> >>> -- int sbi_hart_down()
> >>>
> >>> It powers off the hart and will be used in cpu-hotplug.
> >>> Only individual hart can remove itself from supervisor mode. It can
> >>> be moved to normal state only by sbi_hart_up function.
> >>>
> >>> Return the appropriate SBI error code.
> >>>
> >>> -- u32 sbi_hart_state(unsigned long hartid)
> >>>
> >>> Returns the RISCV_POWER_STATE for a specific hartid. This will help
> >>> make kexec like functionality more robust.
> >>>
> >>> -- void sbi_system_shutdown()
> >>>
> >>> Powers off the entire system.
> >>
> >>
> >> This is a slightly weird one to put in SBI. There's usually other actions
> needed for _system_ level shutdown, such as external power regulators.
> >>
> 
> This might be because of my limited knowledge on power management.
In ACPI, it defines the register block to put processor into different levels of sleep mode (suspend mode). However, this requires additional power management controller or processor CSRs on RISC-V. If we don?t consider ACPI and H/W capabilities of power MGMT on RISC-V at this moment, then SBI for processor power management may be needed.
My question is can SBI_hart_up () to execute "start" even the hart is not in Suspend or Down state? I am asking this because on UEFI we would like to have SBI for supervisor mode firmware to invoke functions provided by M-mode driver, just trying to leverage SBI_hart_up () for this intention. However, "Start" is defined as an address to entry into supervisor mode. We may need to add an additional parameter to this SBI which indicates the privilege to execute "Start" though.
Forget this if this SBI is dedicated for processor power management. We can propose new SBI for above intention.

> We already have a system reset call in SBI & PSCI also had system shutdown
Is system reset call defined in SBI spec as well? I don?t see this in Github.

> function. As per my understanding, this API will provide a way to handle all
> common suspend related operations on machine mode.
> In case of virtual OS, it will not result in any external power regulations.

WARNING: multiple messages have this Message-ID (diff)
From: "Chang, Abner (HPS SW/FW Technologist)" <abner.chang@hpe.com>
To: Atish Patra <atish.patra@wdc.com>,
	Olof Johansson <olof.johansson@gmail.com>
Cc: "mark.rutland@arm.com" <mark.rutland@arm.com>,
	"zong@andestech.com" <zong@andestech.com>,
	Damien Le Moal <Damien.LeMoal@wdc.com>,
	Andrew Waterman <andrew@sifive.com>,
	"alankao@andestech.com" <alankao@andestech.com>,
	"Chen, Gilbert" <gilbert.chen@hpe.com>,
	"anup@brainfault.org" <anup@brainfault.org>,
	Palmer Dabbelt <palmer@sifive.com>,
	"rjones@redhat.com" <rjones@redhat.com>,
	"hch@infradead.org" <hch@infradead.org>,
	"vincentc@andestech.com" <vincentc@andestech.com>,
	"mjc@sifive.com" <mjc@sifive.com>, Arnd Bergmann <arnd@arndb.de>,
	"paul.walmsley@sifive.com" <paul.walmsley@sifive.com>,
	"linux-riscv@lists.infradead.org"
	<linux-riscv@lists.infradead.org>
Subject: RE: SBI extension proposal
Date: Fri, 2 Nov 2018 06:31:10 +0000	[thread overview]
Message-ID: <TU4PR8401MB09581F92A2F7C0C7FFFA190EFFCF0@TU4PR8401MB0958.NAMPRD84.PROD.OUTLOOK.COM> (raw)
Message-ID: <20181102063110.vHC8SlZXpBgHmqVyWSyaV-ukuRndNOQM4LOB_oNTlIs@z> (raw)
In-Reply-To: <cf729ca1-3ad0-8fe8-5cfa-d09d6c28d831@wdc.com>


> >>> -- int sbi_hart_up(unsigned long hartid, unsigned long start,
> >>> unsigned long priv)
> >>>
> >>> Brings up "hartid" either during initial boot or after a
> >>> sbi_hart_down SBI call.
> >>>
> >>> "start" points to a runtime-specified address where a hart can enter
> >>> into supervisor mode. This must be a physical address.
> >>>
> >>> "priv" is a private data that caller can use to pass information
> >>> about execution context.
> >>>
> >>> Return the appropriate SBI error code.
> >>>
> >>> -- int sbi_hart_suspend(u32 state, unsigned long resume_entry,
> >>> unsigned long priv)
> >>>
> >>> Suspends the calling hart to a particular power state. Suspended
> >>> hart will automatically wake-up based on some wakeup events at
> >>> resume_entry physical address.
> >>>
> >>> "priv" is a private data that caller can use to pass information
> >>> about execution context. The SBI implementation must save a copy so
> >>> that caller can reuse while restoring hart from suspend.
> >>>
> >>> Return the appropriate SBI error code.
> >>>
> >>> -- int sbi_hart_down()
> >>>
> >>> It powers off the hart and will be used in cpu-hotplug.
> >>> Only individual hart can remove itself from supervisor mode. It can
> >>> be moved to normal state only by sbi_hart_up function.
> >>>
> >>> Return the appropriate SBI error code.
> >>>
> >>> -- u32 sbi_hart_state(unsigned long hartid)
> >>>
> >>> Returns the RISCV_POWER_STATE for a specific hartid. This will help
> >>> make kexec like functionality more robust.
> >>>
> >>> -- void sbi_system_shutdown()
> >>>
> >>> Powers off the entire system.
> >>
> >>
> >> This is a slightly weird one to put in SBI. There's usually other actions
> needed for _system_ level shutdown, such as external power regulators.
> >>
> 
> This might be because of my limited knowledge on power management.
In ACPI, it defines the register block to put processor into different levels of sleep mode (suspend mode). However, this requires additional power management controller or processor CSRs on RISC-V. If we don’t consider ACPI and H/W capabilities of power MGMT on RISC-V at this moment, then SBI for processor power management may be needed.
My question is can SBI_hart_up () to execute "start" even the hart is not in Suspend or Down state? I am asking this because on UEFI we would like to have SBI for supervisor mode firmware to invoke functions provided by M-mode driver, just trying to leverage SBI_hart_up () for this intention. However, "Start" is defined as an address to entry into supervisor mode. We may need to add an additional parameter to this SBI which indicates the privilege to execute "Start" though.
Forget this if this SBI is dedicated for processor power management. We can propose new SBI for above intention.

> We already have a system reset call in SBI & PSCI also had system shutdown
Is system reset call defined in SBI spec as well? I don’t see this in Github.

> function. As per my understanding, this API will provide a way to handle all
> common suspend related operations on machine mode.
> In case of virtual OS, it will not result in any external power regulations.





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  parent reply	other threads:[~2018-11-02  6:31 UTC|newest]

Thread overview: 47+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-10-31 18:23 SBI extension proposal Atish Patra
2018-10-31 18:23 ` Atish Patra
     [not found] ` <CAK-hmcQeiGa3BwnzEVB_dyhFiC7rXHFN-wTsJomg-jAo7a+v3Q@mail.gmail.com>
2018-10-31 19:11   ` Olof Johansson
2018-10-31 19:11     ` Olof Johansson
2018-10-31 20:37     ` Atish Patra
2018-10-31 20:37       ` Atish Patra
2018-11-02  6:31       ` Chang, Abner (HPS SW/FW Technologist) [this message]
2018-11-02  6:31         ` Chang, Abner (HPS SW/FW Technologist)
2018-11-02 22:31         ` Atish Patra
2018-11-02 22:31           ` Atish Patra
2018-11-04 14:36           ` Chang, Abner (HPS SW/FW Technologist)
2018-11-04 14:36             ` Chang, Abner (HPS SW/FW Technologist)
     [not found] ` <CA+h06zgcyWz7WMbzQxjyc9V5S3CokqSoO1mGOaynJE3uJE5QSg@mail.gmail.com>
2018-11-01  9:35   ` Anup Patel
2018-11-01  9:35     ` Anup Patel
2018-11-01  9:46     ` Richard W.M. Jones
2018-11-01  9:46       ` Richard W.M. Jones
2018-11-01 11:03       ` Philipp Hug
2018-11-01 11:03         ` Philipp Hug
2018-11-01 11:25         ` Richard W.M. Jones
2018-11-01 11:25           ` Richard W.M. Jones
2018-11-01 15:09           ` Atish Patra
2018-11-01 15:09             ` Atish Patra
2018-11-02  3:17             ` Olof Johansson
2018-11-02  3:17               ` Olof Johansson
2018-11-01 16:42       ` Karsten Merker
2018-11-02  2:49         ` Palmer Dabbelt
2018-11-02  2:49           ` Palmer Dabbelt
2018-11-02  3:27           ` Anup Patel
2018-11-02  3:27             ` Anup Patel
2018-11-02  4:29             ` Chang, Abner (HPS SW/FW Technologist)
2018-11-02  4:29               ` Chang, Abner (HPS SW/FW Technologist)
2018-11-02 15:24 ` Nick Kossifidis
2018-11-02 15:24   ` Nick Kossifidis
2018-11-02 23:12   ` Atish Patra
2018-11-02 23:12     ` Atish Patra
2018-11-02 23:45     ` Nick Kossifidis
2018-11-02 23:45       ` Nick Kossifidis
2018-11-03  0:00       ` Atish Patra
2018-11-03  0:00         ` Atish Patra
2018-11-05 13:50         ` Nick Kossifidis
2018-11-05 13:50           ` Nick Kossifidis
2018-11-05 18:51           ` Atish Patra
2018-11-05 18:51             ` Atish Patra
2018-11-06  1:55             ` Zong Li
2018-11-06  1:55               ` Zong Li
2018-11-09 21:47               ` Atish Patra
2018-11-09 21:47                 ` Atish Patra

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