From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id DB1C6C433FE for ; Fri, 18 Nov 2022 19:37:10 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=2WU2CYlgE2zL9RxNKNWHp2mALn/hsxJcddWhkbdBWV4=; b=eLxhnPfHV0pCjY xdiGkPpdoHaxsUQdngPTnixjb6aBzKtpHdA+ZPWKWNVCWSuHPR/5ZqxbsusiGkL4vKgLc02YMiwWU X9HwpPW1i0xVN7e4NfxhxbiqusBySxkL6c5kvStehSGYQEf7JIn3ar+QY3DCw75rzFTgEcKa0pKdS qJFg4D9oZ3x0SZVeR7cnzH9P76I+fYSr+K+HMOlbR6BDGveB5bb5acmpkUnhlALQkG70+8Vp7pjuz Z/A/3QypTo545HOkSwpY8Vh+g767zPJfonwbj2nKZas28zy4OcH2RmDyqtfn4RLD9RKZBQCLFnJLo GNHxMW1mNfelCofHuRmQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1ow7AZ-007cvq-KQ; Fri, 18 Nov 2022 19:36:59 +0000 Received: from dfw.source.kernel.org ([2604:1380:4641:c500::1]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1ow7AX-007cue-BV for linux-riscv@lists.infradead.org; Fri, 18 Nov 2022 19:36:58 +0000 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 3963962741; Fri, 18 Nov 2022 19:36:54 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 58BFFC433D6; Fri, 18 Nov 2022 19:36:51 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1668800213; bh=tehCaVCC8Hs5tjHCa5kocIARBzPlPu/f+CEu9EDfC+0=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=cQHhooj1m/DN7Xh6ISJQ2PkNlWxl7L6zFWwMjsf1nXd4JuiunETBy+65vQbbg8w8h pqArn4kQhC5+3iNBEORrEoE81EUieEp789qgnc1/jxViO6ppQwnkzeb9JMsYbkb+zN Bvbno9F0Pk2BjcGg2riH3y6SzRLYF6waqt1CMLt3PeMb4RBa3ZCoxCdCYRT0BWX05A jrInQcNHy0GALTRG0ggIkXK5KO3XfB+hLNRumXtaWYxz/UkCZ4aVLFGIIWXYkQ5g6o RsLv6zR6hmzYmVUjrqUS3NOIwVDOWvgO5iQfxNhaAewJNBzK8vQslE4gNgAtLb6Fby //j2t3QwBIXDw== Date: Fri, 18 Nov 2022 19:36:48 +0000 From: Conor Dooley To: Walker Chen , Arnd Bergmann Cc: linux-riscv@lists.infradead.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, Rob Herring , Krzysztof Kozlowski , Conor Dooley , "Rafael J . Wysocki" , linux-kernel@vger.kernel.org, Emil Renner Berthing Subject: Re: [PATCH v1 3/4] soc: starfive: Add StarFive JH71XX pmu driver Message-ID: References: <20221118133216.17037-1-walker.chen@starfivetech.com> <20221118133216.17037-4-walker.chen@starfivetech.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20221118133216.17037-4-walker.chen@starfivetech.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20221118_113657_452315_AA9A4638 X-CRM114-Status: GOOD ( 16.39 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org Hey Walker, On Fri, Nov 18, 2022 at 09:32:15PM +0800, Walker Chen wrote: > Add generic power domain driver for the StarFive JH71XX SoC. > > Signed-off-by: Walker Chen > --- > MAINTAINERS | 8 + > diff --git a/MAINTAINERS b/MAINTAINERS > index a70c1d0f303e..112f1e698723 100644 > --- a/MAINTAINERS > +++ b/MAINTAINERS > @@ -19623,6 +19623,14 @@ F: Documentation/devicetree/bindings/reset/starfive,jh7100-reset.yaml > F: drivers/reset/starfive/ > F: include/dt-bindings/reset/starfive* > > +STARFIVE JH71XX PMU CONTROLLER DRIVER > +M: Walker Chen > +S: Maintained Should this be supported? (ditto the other series that you guys have sent out in the last few days) > +F: Documentation/devicetree/bindings/power/starfive* > +F: drivers/soc/starfive/jh71xx_pmu.c > +F: include/soc/starfive/pm_domains.h > +F: include/dt-bindings/power/jh7110-power.h I noticed that you have not CCed Arnd on these patches, which makes me wonder how do you intend getting these patches applied? Until now, Palmer has mostly merged RISC-V drivers/soc patches, but in the last few days I've taken over for drivers/soc/{sifive,microchip}. Are you going to send PRs for this stuff to Arnd, or would you like me to apply patches for drivers/soc/startech? I happy to do that for you if you like. If you're going to send pull requests, I am not sure if Arnd requires GPG signed tags for them. Arnd? Otherwise, if you want me to take them, please add something like the following, in addition to the entry your series already adds for the specific driver: STARFIVE SOC DRIVERS M: Conor Dooley S: Maintained T: git https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux.git/ F: drivers/soc/starfive/ F: include/soc/starfive/ Thanks, Conor. _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv