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[82.37.195.13]) by smtp.gmail.com with ESMTPSA id p8-20020a7bcc88000000b003fb225d414fsm10140509wma.21.2023.06.29.07.02.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 29 Jun 2023 07:02:49 -0700 (PDT) Date: Thu, 29 Jun 2023 15:02:46 +0100 From: Daniel Thompson To: guoren@kernel.org Cc: arnd@arndb.de, palmer@rivosinc.com, tglx@linutronix.de, peterz@infradead.org, luto@kernel.org, conor.dooley@microchip.com, heiko@sntech.de, jszhang@kernel.org, lazyparser@gmail.com, falcon@tinylab.org, chenhuacai@kernel.org, apatel@ventanamicro.com, atishp@atishpatra.org, mark.rutland@arm.com, ben@decadent.org.uk, bjorn@kernel.org, palmer@dabbelt.com, linux-arch@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, Guo Ren , =?iso-8859-1?Q?Bj=F6rn_T=F6pel?= , Yipeng Zou , Vincent Chen Subject: Re: [PATCH -next V17 4/7] riscv: entry: Convert to generic entry Message-ID: References: <20230222033021.983168-1-guoren@kernel.org> <20230222033021.983168-5-guoren@kernel.org> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20230222033021.983168-5-guoren@kernel.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230629_070253_143361_BD16A141 X-CRM114-Status: GOOD ( 16.46 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org On Tue, Feb 21, 2023 at 10:30:18PM -0500, guoren@kernel.org wrote: > From: Guo Ren > > This patch converts riscv to use the generic entry infrastructure from > kernel/entry/*. The generic entry makes maintainers' work easier and > codes more elegant. Here are the changes: > > - More clear entry.S with handle_exception and ret_from_exception > - Get rid of complex custom signal implementation > - Move syscall procedure from assembly to C, which is much more > readable. > - Connect ret_from_fork & ret_from_kernel_thread to generic entry. > - Wrap with irqentry_enter/exit and syscall_enter/exit_from_user_mode > - Use the standard preemption code instead of custom > > Suggested-by: Huacai Chen > Reviewed-by: Bj=F6rn T=F6pel > Tested-by: Yipeng Zou > Tested-by: Jisheng Zhang > Signed-off-by: Guo Ren > Signed-off-by: Guo Ren > Cc: Ben Hutchings Apologies for the late feedback but I've been swamped lately and only recently got round to running the full kgdb test suite on the v6.4 series. The kgdb test suite includes a couple of tests that verify that the system resumes after breakpointing due to a BUG(): https://github.com/daniel-thompson/kgdbtest/blob/master/tests/test_kdb_faul= t_injection.py#L24-L45 These tests have regressed on riscv between v6.3 and v6.4 and a bisect is pointing at this patch. With these changes in place then, after kdb resumes the system, the BUG() message is printed as normal but then immediately fails. From the backtrace it looks like the new entry/exit code cannot advance past a compiled breakpoint instruction: ~~~ PANIC: Fatal exception in interrupt Entering kdb (current=3D0xff60000001a2a280, pid 104) on processor 1 due to NonMask able Interrupt @ 0xffffffff800bb3c4 [1]kdb> bt Stack traceback for pid 104 0xff60000001a2a280 104 92 1 1 R 0xff60000001a2ac50 *echo CPU: 1 PID: 104 Comm: echo Tainted: G D 6.3.0-rc1-00003-gf0bddf50586d #119 Hardware name: riscv-virtio,qemu (DT) Call Trace: [] dump_backtrace+0x1c/0x24 [] show_stack+0x2c/0x38 [] dump_stack_lvl+0x3c/0x54 [] dump_stack+0x14/0x1c [] kdb_dump_stack_on_cpu+0x64/0x66 [] kdb_show_stack+0x82/0x88 [] kdb_bt1+0x90/0xf2 [] kdb_bt+0x34c/0x384 [] kdb_parse+0x27a/0x618 [] kdb_main_loop+0x3b2/0x8fa [] kdb_stub+0x1ba/0x3a8 [] kgdb_cpu_enter+0x342/0x5ba [] kgdb_handle_exception+0xe0/0x11a [] kgdb_riscv_notify+0x86/0xb4 [] notify_die+0x6a/0xa6 [] handle_break+0x70/0xe0 [] do_trap_break+0x48/0x5c [] ret_from_exception+0x0/0x64 [] kgdb_compiled_break+0x0/0x14 ~~~ Daniel. _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv