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Thu, 05 Sep 2019 00:54:10 -0700 (PDT) Date: Thu, 5 Sep 2019 00:54:08 -0700 (PDT) From: Paul Walmsley X-X-Sender: paulw@viisi.sifive.com To: Mao Han Subject: Re: [PATCH V7 1/2] riscv: Add support for perf registers sampling In-Reply-To: <49c2c29459afc59130b036eba1b1fd5155572355.1567653632.git.han_mao@c-sky.com> Message-ID: References: <49c2c29459afc59130b036eba1b1fd5155572355.1567653632.git.han_mao@c-sky.com> User-Agent: Alpine 2.21.9999 (DEB 301 2018-08-15) MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190905_005411_943341_4536C6EE X-CRM114-Status: UNSURE ( 8.48 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Palmer Dabbelt , linux-kernel@vger.kernel.org, linux-csky@vger.kernel.org, Guo Ren , Greentime Hu , linux-riscv@lists.infradead.org, Christoph Hellwig Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+infradead-linux-riscv=archiver.kernel.org@lists.infradead.org On Thu, 5 Sep 2019, Mao Han wrote: > This patch implements the perf registers sampling and validation API > for riscv arch. The valid registers and their register ID are defined in > perf_regs.h. Perf tool can backtrace in userspace with unwind library > and the registers/user stack dump support. > > Signed-off-by: Mao Han > Cc: Paul Walmsley > Cc: Greentime Hu > Cc: Palmer Dabbelt > Cc: linux-riscv > Cc: Christoph Hellwig > Cc: Guo Ren Thanks, queued for v5.4-rc1 with Greentime's Tested-by: (since the changes from v6 to v7 had no functional impact). - Paul _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv