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Wed, 18 Sep 2019 06:41:07 -0700 (PDT) Date: Wed, 18 Sep 2019 06:41:06 -0700 (PDT) From: Paul Walmsley X-X-Sender: paulw@viisi.sifive.com To: Yash Shah Subject: Re: [PATCH] riscv: dts: Add DT support for SiFive FU540 PWM driver In-Reply-To: Message-ID: References: User-Agent: Alpine 2.21.9999 (DEB 301 2018-08-15) MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190918_064110_981937_B54088D3 X-CRM114-Status: GOOD ( 17.90 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , devicetree@vger.kernel.org, Albert Ou , Palmer Dabbelt , "linux-kernel@vger.kernel.org List" , Sachin Ghadi , Rob Herring , Sagar Kadam , linux-riscv@lists.infradead.org, Bin Meng Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+infradead-linux-riscv=archiver.kernel.org@lists.infradead.org On Mon, 16 Sep 2019, Yash Shah wrote: > On Sat, Sep 14, 2019 at 2:50 AM Palmer Dabbelt wrote: > > > > On Tue, 10 Sep 2019 02:52:07 PDT (-0700), yash.shah@sifive.com wrote: > > > Hi, > > > > > > Any comments on this patch? > > > > I don't see "sifive,pwm0" in the DT bindings documentation, and it doesn't > > match our standard way of doing these things (which would have at least > > "sifive,fu540-c000-pwm"). > > "sifive,pwm0" is present in the DT bindings documentation at > Documentation/devicetree/bindings/pwm/pwm-sifive.txt > Yes, I agree that this patch is missing "sifive,fu540-c000-pwm". I > will add it along with "sifive,pwm0" and repost as version 2. Fixed the compat string here and also dropped the superfluous reg-names property from pwm1. Queued for v5.4-rc, thanks. - Paul From: Yash Shah Date: Wed, 21 Aug 2019 14:53:40 +0530 Subject: [PATCH] riscv: dts: Add DT support for SiFive FU540 PWM driver Add the PWM DT node in SiFive FU540 soc-specific DT file. Enable the PWM nodes in HiFive Unleashed board-specific DT file. Signed-off-by: Yash Shah Cc: Palmer Dabbelt [paul.walmsley@sifive.com: added chip-specific compatible string; dropped reg-names string from pwm1] Signed-off-by: Paul Walmsley --- arch/riscv/boot/dts/sifive/fu540-c000.dtsi | 18 ++++++++++++++++++ .../boot/dts/sifive/hifive-unleashed-a00.dts | 8 ++++++++ 2 files changed, 26 insertions(+) diff --git a/arch/riscv/boot/dts/sifive/fu540-c000.dtsi b/arch/riscv/boot/dts/sifive/fu540-c000.dtsi index 42b5ec223100..5a29211d396e 100644 --- a/arch/riscv/boot/dts/sifive/fu540-c000.dtsi +++ b/arch/riscv/boot/dts/sifive/fu540-c000.dtsi @@ -230,6 +230,24 @@ #size-cells = <0>; status = "disabled"; }; + pwm0: pwm@10020000 { + compatible = "sifive,fu540-c000-pwm", "sifive,pwm0"; + reg = <0x0 0x10020000 0x0 0x1000>; + interrupt-parent = <&plic0>; + interrupts = <42 43 44 45>; + clocks = <&prci PRCI_CLK_TLCLK>; + #pwm-cells = <3>; + status = "disabled"; + }; + pwm1: pwm@10021000 { + compatible = "sifive,fu540-c000-pwm", "sifive,pwm0"; + reg = <0x0 0x10021000 0x0 0x1000>; + interrupt-parent = <&plic0>; + interrupts = <46 47 48 49>; + clocks = <&prci PRCI_CLK_TLCLK>; + #pwm-cells = <3>; + status = "disabled"; + }; }; }; diff --git a/arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts b/arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts index 93d68cbd64fe..104d334511cd 100644 --- a/arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts +++ b/arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts @@ -85,3 +85,11 @@ reg = <0>; }; }; + +&pwm0 { + status = "okay"; +}; + +&pwm1 { + status = "okay"; +}; -- 2.23.0 _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv