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* RISC-V nommu support v5
@ 2019-10-17 17:37 Christoph Hellwig
  2019-10-17 17:37 ` [PATCH 01/15] riscv: cleanup <asm/bug.h> Christoph Hellwig
                   ` (15 more replies)
  0 siblings, 16 replies; 41+ messages in thread
From: Christoph Hellwig @ 2019-10-17 17:37 UTC (permalink / raw)
  To: Palmer Dabbelt, Paul Walmsley; +Cc: Damien Le Moal, linux-riscv, linux-kernel

Hi all,

below is a series to support nommu mode on RISC-V.  For now this series
just works under qemu with the qemu-virt platform, but Damien has also
been able to get kernel based on this tree with additional driver hacks
to work on the Kendryte KD210, but that will take a while to cleanup
an upstream.

A git tree is available here:

    git://git.infradead.org/users/hch/riscv.git riscv-nommu.5

Gitweb:

    http://git.infradead.org/users/hch/riscv.git/shortlog/refs/heads/riscv-nommu.5

I've also pushed out a builtroot branch that can build a RISC-V nommu
root filesystem here:

   git://git.infradead.org/users/hch/buildroot.git riscv-nommu.2

Gitweb:

   http://git.infradead.org/users/hch/buildroot.git/shortlog/refs/heads/riscv-nommu.2


Changes since v4:
 - rebased to 5.4-rc + latest riscv fixes
 - clean up do_trap_break
 - fix an SR_XPIE issue (Paul Walmsley)
 - use the symbolic PAGE_OFFSET value in the flat loader
   (Aurabindo Jayamohanan)

Changes since v3:
 - improve a few commit message
 - cleanup riscv_cpuid_to_hartid_mask
 - cleanup the timer handling
 - cleanup the IPI handling a little more
 - renamed CONFIG_M_MODE to CONFIG_RISCV_M_MODE
 - split out CONFIG_RISCV_SBI to make some of the ifdefs more obbious
 - use IS_ENABLED wherever possible instead of if ifdefs to make the
   code more readable

Changes since v2:
 - rebased to 5.3-rc
 - remove the EFI image header for nommu builds
 - set ARCH_SLAB_MINALIGN to ensure stack alignment in the flat binary
   loader
 - minor comment improvement
 - use #defines for more CSRs

Changes since v1:
 - fixes so that a kernel with this series still work on builds with an
   IOMMU
 - small clint cleanups
 - the binfmt_flat base and buildroot now don't put arguments on the stack

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^ permalink raw reply	[flat|nested] 41+ messages in thread

end of thread, other threads:[~2019-11-14  7:40 UTC | newest]

Thread overview: 41+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2019-10-17 17:37 RISC-V nommu support v5 Christoph Hellwig
2019-10-17 17:37 ` [PATCH 01/15] riscv: cleanup <asm/bug.h> Christoph Hellwig
2019-10-18  2:50   ` Anup Patel
2019-10-23 22:04   ` Paul Walmsley
2019-10-17 17:37 ` [PATCH 02/15] riscv: cleanup do_trap_break Christoph Hellwig
2019-10-18  2:51   ` Anup Patel
2019-10-23 22:05   ` Paul Walmsley
2019-10-17 17:37 ` [PATCH 03/15] riscv: abstract out CSR names for supervisor vs machine mode Christoph Hellwig
2019-10-18  2:51   ` Anup Patel
2019-10-18 23:55   ` Paul Walmsley
2019-10-28  8:12     ` Christoph Hellwig
2019-10-17 17:37 ` [PATCH 04/15] riscv: don't allow selecting SBI based drivers for M-mode Christoph Hellwig
2019-10-18  2:52   ` Anup Patel
2019-10-17 17:37 ` [PATCH 05/15] riscv: poison SBI calls " Christoph Hellwig
2019-10-18  2:53   ` Anup Patel
2019-10-17 17:37 ` [PATCH 06/15] riscv: cleanup the default power off implementation Christoph Hellwig
2019-10-18  2:53   ` Anup Patel
2019-10-17 17:37 ` [PATCH 07/15] riscv: implement remote sfence.i using IPIs Christoph Hellwig
2019-10-18  2:55   ` Anup Patel
2019-10-17 17:37 ` [PATCH 08/15] riscv: add support for MMIO access to the timer registers Christoph Hellwig
2019-10-18  2:57   ` Anup Patel
2019-10-17 17:37 ` [PATCH 09/15] riscv: provide native clint access for M-mode Christoph Hellwig
2019-10-18  3:00   ` Anup Patel
2019-11-14  7:39   ` Paul Walmsley
2019-10-17 17:37 ` [PATCH 10/15] riscv: read the hart ID from mhartid on boot Christoph Hellwig
2019-10-18  3:01   ` Anup Patel
2019-11-14  7:40   ` Paul Walmsley
2019-10-17 17:37 ` [PATCH 11/15] riscv: use the correct interrupt levels for M-mode Christoph Hellwig
2019-10-18  3:01   ` Anup Patel
2019-10-17 17:37 ` [PATCH 12/15] riscv: clear the instruction cache and all registers when booting Christoph Hellwig
2019-10-18  3:05   ` Anup Patel
2019-10-17 17:37 ` [PATCH 13/15] riscv: add nommu support Christoph Hellwig
2019-10-18  3:04   ` Anup Patel
2019-10-17 17:37 ` [PATCH 14/15] riscv: provide a flat image loader Christoph Hellwig
2019-10-18  3:06   ` Anup Patel
2019-10-17 17:37 ` [PATCH 15/15] riscv: disable the EFI PECOFF header for M-mode Christoph Hellwig
2019-10-18  3:06   ` Anup Patel
2019-10-18  3:08 ` RISC-V nommu support v5 Anup Patel
2019-10-18  3:29   ` Paul Walmsley
2019-10-18 15:25     ` Christoph Hellwig
2019-10-18 23:46       ` Paul Walmsley

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