From: Paolo Bonzini <pbonzini@redhat.com>
To: Anup Patel <anup@brainfault.org>
Cc: Damien Le Moal <Damien.LeMoal@wdc.com>,
Palmer Dabbelt <palmer@sifive.com>,
Daniel Lezcano <daniel.lezcano@linaro.org>,
"kvm@vger.kernel.org" <kvm@vger.kernel.org>,
Radim K <rkrcmar@redhat.com>, Anup Patel <Anup.Patel@wdc.com>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
Christoph Hellwig <hch@infradead.org>,
Atish Patra <Atish.Patra@wdc.com>,
Alistair Francis <Alistair.Francis@wdc.com>,
Paul Walmsley <paul.walmsley@sifive.com>,
Thomas Gleixner <tglx@linutronix.de>,
"linux-riscv@lists.infradead.org"
<linux-riscv@lists.infradead.org>
Subject: Re: [RFC PATCH v2 08/19] RISC-V: KVM: Implement VCPU world-switch
Date: Fri, 2 Aug 2019 10:59:36 +0200 [thread overview]
Message-ID: <f9dee99d-f536-e351-f637-b5098d53be22@redhat.com> (raw)
In-Reply-To: <CAAhSdy2_ZsnT7gSKb624r9wzuJSx+1TnKxgW6srtqvXV1Ri9Aw@mail.gmail.com>
On 02/08/19 10:43, Anup Patel wrote:
>> A possible optimization: if these cannot change while Linux runs (I am
>> thinking especially of STVEC and HSTATUS, but perhaps SSCRATCH can be
>> saved on kvm_arch_vcpu_load too) you can avoid the csrr and store.
> Actual exception vector of Host Linux is different so we switch STVEC
> every time.
>
> HSTATUS.SPV is set whenever we come back from Guest world so
> while we are in in-kernel run loop with interrupts enabled we can get
> external interrupt and HSTATUS.SPV bit can affect SRET of interrupt
> handler. To handle this we switch HSTATUS every time.
>
> The world switch code uses SSCRATCH to save vcpu->arch pointer
> which is later used on return path. Now, I did not want to restrict Host
> Linux from using SSCRATCH for some other purpose hence we
> switch SSCRATCH every time.
Right, I'm not saying not to save these registers. I'm saying not to
read the host value on every world switch, instead load it in
hardware_enable (if it's the same for all physical CPUs) or
kvm_arch_vcpu_load (if it's different for every physical CPU).
IIUC Linux does not use SSCRATCH while in the kernel (it must be zero
while handling an exception, but handle_exception takes care of that).
I think it's okay if you make this assumption, but if you don't want to
make it, you can still save it in kvm_arch_vcpu_load rather than here
since you "own" the thread while in KVM_RUN.
Paolo
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next prev parent reply other threads:[~2019-08-02 8:59 UTC|newest]
Thread overview: 46+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-08-02 7:46 [RFC PATCH v2 00/19] KVM RISC-V Support Anup Patel
2019-08-02 7:47 ` [RFC PATCH v2 01/19] KVM: RISC-V: Add KVM_REG_RISCV for ONE_REG interface Anup Patel
2019-08-02 7:47 ` [RFC PATCH v2 02/19] RISC-V: Export few kernel symbols Anup Patel
2019-08-02 7:47 ` [RFC PATCH v2 03/19] RISC-V: Add hypervisor extension related CSR defines Anup Patel
2019-08-02 7:47 ` [RFC PATCH v2 04/19] RISC-V: Add initial skeletal KVM support Anup Patel
2019-08-02 9:01 ` Paolo Bonzini
2019-08-05 5:48 ` Anup Patel
2019-08-02 7:47 ` [RFC PATCH v2 05/19] RISC-V: KVM: Implement VCPU create, init and destroy functions Anup Patel
2019-08-02 7:47 ` [RFC PATCH v2 06/19] RISC-V: KVM: Implement VCPU interrupts and requests handling Anup Patel
2019-08-02 8:17 ` Paolo Bonzini
2019-08-05 12:27 ` Anup Patel
2019-08-02 7:47 ` [RFC PATCH v2 07/19] RISC-V: KVM: Implement KVM_GET_ONE_REG/KVM_SET_ONE_REG ioctls Anup Patel
2019-08-02 9:03 ` Paolo Bonzini
2019-08-05 6:55 ` Anup Patel
2019-08-05 7:10 ` Paolo Bonzini
2019-08-05 11:00 ` Anup Patel
2019-08-05 11:07 ` Paolo Bonzini
2019-08-05 11:37 ` Christian Borntraeger
2019-08-05 11:56 ` Anup Patel
2019-08-05 12:01 ` Paolo Bonzini
2019-08-05 12:13 ` Anup Patel
2019-08-05 11:56 ` Paolo Bonzini
2019-08-02 7:47 ` [RFC PATCH v2 08/19] RISC-V: KVM: Implement VCPU world-switch Anup Patel
2019-08-02 8:30 ` Paolo Bonzini
2019-08-02 8:43 ` Anup Patel
2019-08-02 8:59 ` Paolo Bonzini [this message]
2019-08-02 7:47 ` [RFC PATCH v2 09/19] RISC-V: KVM: Handle MMIO exits for VCPU Anup Patel
2019-08-02 7:47 ` [RFC PATCH v2 10/19] RISC-V: KVM: Handle WFI " Anup Patel
2019-08-02 9:03 ` Paolo Bonzini
2019-08-05 7:12 ` Anup Patel
2019-08-05 7:14 ` Paolo Bonzini
2019-08-05 7:18 ` Anup Patel
2019-08-02 7:48 ` [RFC PATCH v2 11/19] RISC-V: KVM: Implement VMID allocator Anup Patel
2019-08-02 9:19 ` Paolo Bonzini
2019-08-05 10:07 ` Anup Patel
2019-08-02 7:48 ` [RFC PATCH v2 12/19] RISC-V: KVM: Implement stage2 page table programming Anup Patel
2019-08-02 9:14 ` Paolo Bonzini
2019-08-05 10:08 ` Anup Patel
2019-08-02 7:48 ` [RFC PATCH v2 13/19] RISC-V: KVM: Implement MMU notifiers Anup Patel
2019-08-02 7:48 ` [RFC PATCH v2 14/19] RISC-V: KVM: Add timer functionality Anup Patel
2019-08-02 7:48 ` [RFC PATCH v2 15/19] RISC-V: KVM: FP lazy save/restore Anup Patel
2019-08-02 7:48 ` [RFC PATCH v2 16/19] RISC-V: KVM: Implement ONE REG interface for FP registers Anup Patel
2019-08-02 7:48 ` [RFC PATCH v2 17/19] RISC-V: KVM: Add SBI v0.1 support Anup Patel
2019-08-02 7:48 ` [RFC PATCH v2 18/19] RISC-V: Enable VIRTIO drivers in RV64 and RV32 defconfig Anup Patel
2019-08-02 7:48 ` [RFC PATCH v2 19/19] RISC-V: KVM: Add MAINTAINERS entry Anup Patel
2019-08-02 9:22 ` [RFC PATCH v2 00/19] KVM RISC-V Support Paolo Bonzini
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