From mboxrd@z Thu Jan 1 00:00:00 1970 From: palmer@sifive.com (Palmer Dabbelt) Date: Thu, 01 Nov 2018 10:50:04 -0700 (PDT) Subject: [RFC 0/2] RISC-V: A proposal to add vendor-specific code In-Reply-To: <20181101005541.GA25604@andestech.com> Message-ID: To: linux-riscv@lists.infradead.org List-Id: linux-riscv.lists.infradead.org On Wed, 31 Oct 2018 17:55:42 PDT (-0700), alankao at andestech.com wrote: > On Wed, Oct 31, 2018 at 07:17:45AM -0700, Christoph Hellwig wrote: >> On Wed, Oct 31, 2018 at 04:46:10PM +0530, Anup Patel wrote: >> > I agree that we need a place for vendor-specific ISA extensions and >> > having vendor-specific directories is also good. >> >> The only sensible answer is that we should not allow vendor specific >> extensions in the kernel at all. ... > > How can this even be possible if a extension includes an extra register > set as some domain-specific context? In such a case, kernel should > at least process the context during any context switch, just like how it > deals with the FP context. Ya, I think there are cases where vendor-specific extensions are going to be necessary to handle within the kernel. Right now the only one I can think of is the performance counter stuff, where we explicitly allow vendor-specific counters as part of the ISA spec. For stateful extensions, we currently have a standard mechanism where the XS bits get set in sstatus and the actual save/restore code is hidden behind an SBI call. That call doesn't currently exist, but if we just go ahead and add one it should be easy to support this from within Linux. We'll need to figure out how to enable these custom extensions from userspace, but that seems tractable as well. We'll probably also want some fast-path for the V extension (and any other stateful standard extensions), but I think as long as the V extension adds a quick check for dirtiness then it's not a big deal. Do you guys have stateful extensions? We're trying really hard to avoid them at SiFive because they're a huge headache, so unless there's a compelling base of software using one I don't want to go add support if we can avoid it. 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Thu, 01 Nov 2018 10:50:04 -0700 (PDT) Date: Thu, 01 Nov 2018 10:50:04 -0700 (PDT) X-Google-Original-Date: Thu, 01 Nov 2018 10:49:38 PDT (-0700) Subject: Re: [RFC 0/2] RISC-V: A proposal to add vendor-specific code In-Reply-To: <20181101005541.GA25604@andestech.com> From: Palmer Dabbelt To: alankao@andestech.com Message-ID: Mime-Version: 1.0 (MHng) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20181101_105017_095621_D35E6656 X-CRM114-Status: GOOD ( 17.00 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: zong@andestech.com, aou@eecs.berkeley.edu, Arnd Bergmann , greentime@andestech.com, anup@brainfault.org, linux-kernel@vger.kernel.org, Christoph Hellwig , vincentc@andestech.com, linux-riscv@lists.infradead.org, deanbo422@gmail.com Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="us-ascii"; Format="flowed" Sender: "linux-riscv" Errors-To: linux-riscv-bounces+infradead-linux-riscv=archiver.kernel.org@lists.infradead.org Message-ID: <20181101175004.Btuwgn5MuKG3hhugpSMLKRYlB8vEGMaZ_1QEgYAPhkc@z> On Wed, 31 Oct 2018 17:55:42 PDT (-0700), alankao@andestech.com wrote: > On Wed, Oct 31, 2018 at 07:17:45AM -0700, Christoph Hellwig wrote: >> On Wed, Oct 31, 2018 at 04:46:10PM +0530, Anup Patel wrote: >> > I agree that we need a place for vendor-specific ISA extensions and >> > having vendor-specific directories is also good. >> >> The only sensible answer is that we should not allow vendor specific >> extensions in the kernel at all. ... > > How can this even be possible if a extension includes an extra register > set as some domain-specific context? In such a case, kernel should > at least process the context during any context switch, just like how it > deals with the FP context. Ya, I think there are cases where vendor-specific extensions are going to be necessary to handle within the kernel. Right now the only one I can think of is the performance counter stuff, where we explicitly allow vendor-specific counters as part of the ISA spec. For stateful extensions, we currently have a standard mechanism where the XS bits get set in sstatus and the actual save/restore code is hidden behind an SBI call. That call doesn't currently exist, but if we just go ahead and add one it should be easy to support this from within Linux. We'll need to figure out how to enable these custom extensions from userspace, but that seems tractable as well. We'll probably also want some fast-path for the V extension (and any other stateful standard extensions), but I think as long as the V extension adds a quick check for dirtiness then it's not a big deal. Do you guys have stateful extensions? We're trying really hard to avoid them at SiFive because they're a huge headache, so unless there's a compelling base of software using one I don't want to go add support if we can avoid it. _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv